mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 109

• Manufacturer Part Number: mc68hc912bd32
• Description: 16-bit Device Composed Of Standard On-chip Peripherals
• Manufacturer: Freescale Semiconductor, Inc

9-clock
FCME — Force Clock Monitor Enable
FCM — Force Clock Monitor Reset
FCOP — Force COP Watchdog Reset
DISR — Disable Resets from COP Watchdog and Clock Monitor
Write once in normal modes, anytime in special modes. Read
anytime.
In normal modes, when this bit is set, the clock monitor function
cannot be disabled until a reset occurs.
In order to use both STOP and clock monitor, the CME bit should be
cleared prior to executing a STOP instruction and set after recovery
from STOP. If you plan on using STOP always keep FCME = 0.
Writes are not allowed in normal modes, anytime in special modes.
Read anytime.
If DISR is set, this bit has no effect.
Writes are not allowed in normal modes; can be written anytime in
special modes. Read anytime.
If DISR is set, this bit has no effect.
Writes are not allowed in normal modes, anytime in special modes.
Read anytime.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Clock monitor is disabled. Slow clocks and stop instruction may
1 = Slow or stopped clocks (including the stop instruction) will
0 = Clock monitor follows the state of the CME bit.
1 = Slow or stopped clocks will cause a clock reset sequence.
0 = Normal operation.
1 = Force a clock monitor reset (if clock monitor is enabled).
0 = Normal operation.
1 = Force a COP reset (if COP is enabled).
0 = Normal operation.
1 = Regardless of other control bit states, COP and clock monitor
be used.
cause a clock reset sequence.
will not generate a system reset.
Go to: www.freescale.com
Clocks
MC68HC912BD32 Rev 1.0
Clock Function Registers
Clocks