mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 144

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mc68hc912bd32

Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
PACNT — 16-bit Pulse Accumulator Count Register
TIMTST — Timer Test Register
Standard Timer Module
MC68HC912BD32 Rev 1.0
RESET:
RESET:
Bit 15
Bit 7
Bit 7
Bit 7
0
0
0
14
6
6
0
6
0
0
PAIF — Pulse Accumulator Input Edge Flag
TCBYP — Timer Divider Chain Bypass
PCBYP — Pulse Accumulator Divider Chain Bypass
Set when the selected edge is detected at the pulse accumulator
input pin. In event mode, the event edge triggers PAIF. In gated time
accumulation mode, the trailing edge of the gate signal at the pulse
accumulator input pin triggers PAIF. This bit is cleared automatically
by a write to the PAFLG register with bit 0 set.
Full count register access should take place in one clock cycle. A
separate read/write for high byte and low byte will give a different
result than accessing them as a word.
Read or write anytime.
Read anytime. Write only in special mode (SMODN = 0)
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Normal operation
1 = The 16-bit free-running timer counter is divided into two 8-bit
0 = Normal operation
1 = The 16-bit pulse accumulator counter is divided into two 8-bit
13
5
5
0
5
0
0
halves and the prescaler is bypassed. The clock drives both
halves directly.
halves and the prescaler is bypassed. The clock drives both
halves directly.
Go to: www.freescale.com
Standard Timer Module
12
4
4
0
4
0
0
11
3
3
0
3
0
0
10
2
2
0
2
0
0
TCBYP
1
9
1
0
1
0
PCBYP
Bit 0
Bit 8
Bit 0
Bit 0
$00A2–$00A3
0
0
$00AD
14-timer

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