mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 73

• Manufacturer Part Number: mc68hc912bd32
• Description: 16-bit Device Composed Of Standard On-chip Peripherals
• Manufacturer: Freescale Semiconductor, Inc

FEECTL — Flash EEPROM Control Register
5-flash
RESET:
NOTE:
Bit 7
0
0
STRE — Spare Test Row Enable
MWPR — Multiple Word Programming
FEESWAI — Flash EEPROM Stop in Wait Control
The FEESWAI bit cannot be asserted if the interrupt vector resides in the
Flash EEPROM array.
SVFP — Status V
6
0
0
The spare test row consists of one Flash EEPROM array row. The
reserved word at location 31 contains production test information
which must be maintained through several erase cycles. When STRE
is set, the decoding for the spare test row overrides the address lines
which normally select the other rows in the array.
Used primarily for testing, if MPWR = 1, the two least-significant
address lines ADDR[1:0] will be ignored when programming a Flash
EEPROM location. The word location addressed if ADDR[1:0] = 00,
along with the word location addressed if ADDR[1:0] = 10, will both be
programmed with the same word data from the programming latches.
This bit should not be changed during programming.
This register controls the programming and erasure of the Flash
EEPROM.
SVFP is a read only bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = LIB accesses are to the Flash EEPROM array
1 = Spare test row in array enabled if SMOD is active
0 = Multiple word programming disabled
1 = Program 32 bits of data
0 = Do not halt Flash EEPROM clock when the part is in wait mode.
1 = Halt Flash EEPROM clock when the part is in wait mode.
0 = Voltage of V
1 = Voltage of V
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5
0
0
Flash EEPROM
FP
FEESWAI
Voltage
FP
FP
4
0
pin is above normal programming voltage levels
pin is below normal programming voltage levels
SVFP
3
0
ERAS
2
0
MC68HC912BD32 Rev 1.0
Flash EEPROM Registers
LAT
1
0
Flash EEPROM
ENPE
Bit 0
$00F7
0