mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 145

• Manufacturer Part Number: mc68hc912bd32
• Description: 16-bit Device Composed Of Standard On-chip Peripherals
• Manufacturer: Freescale Semiconductor, Inc

DDRT — Data Direction Register for Timer Port
PORTT — Timer Port Data Register
15-timer
RESET:
TIMER
PA
DDT7
I/OC7
Bit 7
Bit 7
PT7
PAI
NOTE:
0
I/OC6
DDT6
PT6
6
0
6
Writes do not change pin state when the pin is configured for timer
output. The minimum pulse width for pulse accumulator input should
always be greater than two module clocks due to input synchronizer
circuitry. The minimum pulse width for the input capture should always
be greater than the width of two module clocks due to input synchronizer
circuitry.
PORTT can be read anytime. When configured as an input, a read will
return the pin level. When configured as output, a read will return the
latched output data.
Read or write anytime.
The timer forces the I/O state to be an output for each timer port pin
associated with an enabled output compare. In these cases the data
direction bits will not be changed but have no affect on the direction
of these pins. The DDRT will revert to controlling the I/O direction of
a pin when the associated timer output compare is disabled. Input
captures do not override the DDRT settings.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Configures the corresponding I/O pin for input only
1 = Configures the corresponding I/O pin for output
I/OC5
DDT5
PT5
5
0
5
Go to: www.freescale.com
Standard Timer Module
I/OC4
DDT4
PT4
4
4
0
I/OC3
DDT3
PT3
3
3
0
I/OC2
DDT2
PT2
2
2
0
I/OC1
DDT1
PT1
1
1
0
MC68HC912BD32 Rev 1.0
Standard Timer Module
I/OC0
DDT0
Bit 0
Bit 0
PT0
0
Timer Registers
$00AE
$00AF