mc68hc912bd32 Freescale Semiconductor, Inc, mc68hc912bd32 Datasheet - Page 189

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mc68hc912bd32

Manufacturer Part Number
mc68hc912bd32
Description
16-bit Device Composed Of Standard On-chip Peripherals
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Wakeup
19-sibus
NOTE:
Bit manipulation instructions (BSET or BCLR) shall not be used to clear
interrupt flags.
The serial bus interface module is able to wake-up from CPU STOP
mode or Module SLEEP mode by the recognition of a falling edge at the
input Rx. The local mask for the wakeup interrupt is the Wakeup
Interrupt Enable bit (WAKEIE). After wake-up a node configured as
Master should start to send SYNC pulses during tsl_min (refer to
transceiver spec ELMOS 100.34) in order to avoid that the transceiver
enters sleep mode again.
1. The X Bit in the condition code register (CCR) is the interrupt mask for the XIRQ pin
2. The I Bit in the condition code register (CCR) is the global interrupt mask for all HC12 CPU
High priority SYNC
Receive Interrupt
FIFO Not Empty
Freescale Semiconductor, Inc.
Synchronization
interrupts.
pulse interrupt
For More Information On This Product,
Function
Interrupt
Interrupt
Interrupt
General
Go to: www.freescale.com
Byteflight™ Module
Table 38 Module Interrupt Vectors
IFLG [15..0] (RX)
IFLG [15..0] (TX)
WAKEIF
SLMMIF
SYNNIF
OVRNIF
XSYNIF
RCVFIF
SYNAIF
SYNEIF
LOCKIF
SYNLIF
Source
ERRIF
ILLPIF
IENA [15:0]
IENA [15:0]
OVRNIE
WAKEIE
SLMMIE
XSYNIE
RCVFIE
SYNAIE
SYNNIE
SYNEIE
LOCKIE
SYNLIE
ERRIE
ILLPIE
Local
Mask
MC68HC912BD32 Rev 1.0
Functional Overview
Byteflight™ Module
Global
X Bit
I Bit
Mask
(2)
(1)

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