mpc8309 Freescale Semiconductor, Inc, mpc8309 Datasheet - Page 25

• Manufacturer Part Number: mpc8309
• Description: Powerquicc Ii Pro Integrated Communications Processor Family Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Figure 14
Figure 12
8.2.1.2
Table 21
Freescale Semiconductor
At recommended operating conditions with OV
RX_CLK clock period 10 Mbps
RX_CLK clock period 100 Mbps
RX_CLK duty cycle
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
RX_CLK clock rise V
RX_CLK clock fall time V
Note:
1. The symbols used for timing specifications follow the pattern of t
inputs and t
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
going to the high (H) state or setup time. Also, t
signals (D) went invalid (X) relative to the t
the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
example, the subscript of t
with the appropriate letter: R (rise) or F (fall).
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
provides the MII receive AC timing specifications.
provides the AC test load.
shows the MII transmit AC timing diagram.
(first two letters of functional block)(reference)(state)(signal)(state)
MII Receive AC Timing Specifications
TXD[3:0]
TX_CLK
Parameter/Condition
TX_EN
TX_ER
IL
(min) to V
IH
(max) to V
Output
MRX
IH
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
(max)
Table 21. MII Receive AC Timing Specifications
Figure 12. MII Transmit AC Timing Diagram
IL
t
MTXH
(min)
DD
MRX
of 3.3 V ± 300mV.
t
MTX
Figure 11. AC Test Load
clock reference (K) going to the low (L) state or hold time. Note that, in general,
MRDXKL
Z
0
= 50 
symbolizes MII receive timing (GR) with respect to the time data input
t
t
MTKHDX
t
MRXH
Symbol
MTXF
t
t
MRDVKH
MRDXKH
t
t
(first two letters of functional block)(signal)(state)(reference)(state)
t
t
MRXR
MRXF
MRX
MRX
for outputs. For example, t
/t
MRX
1
R
L
t
MTXR
= 50 
10.0
10.0
Min
1.0
1.0
35
—
—
OV
Typical
DD
MRDVKH
400
40
—
—
—
—
—
/2
Ethernet and MII Management
MRX
symbolizes MII receive
clock reference (K)
Max
4.0
4.0
65
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
%
for
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