mpc8309 Freescale Semiconductor, Inc, mpc8309 Datasheet - Page 70

• Manufacturer Part Number: mpc8309
• Description: Powerquicc Ii Pro Integrated Communications Processor Family Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

Clocking
23.5
RCWL[COREPLL] selects the ratio between the internal coherent system bus clock (csb_clk) and the e300
core clock (core_clk).
in
70
nn
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
Table 60
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
0-1
Core PLL Configuration
should be considered reserved.
RCWL[COREPLL]
SPMF
0010
0100
0101
0011
0110
0000
0001
0001
0001
0001
0001
0001
0001
0001
0010
0010
0010
0010
0010
0010
0010
0010
0011
2-5
Table 60
csb_clk : sys_clk_in Ratio
shows the encodings for RCWL[COREPLL]. COREPLL values not listed
6
n
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
Table 60. e300 Core PLL Configuration
2:1
3:1
4:1
5:1
6:1
Table 59. CSB Frequency Options
(PLL off, csb_clk clocks core directly)
core_clk : csb_clk Ratio
PLL bypassed
1.5:1
1.5:1
1.5:1
1.5:1
2.5:1
2.5:1
2.5:1
2.5:1
1:1
1:1
1:1
1:1
2:1
2:1
2:1
2:1
3:1
125
25
csb_clk Frequency (MHz)
PCI_SYNC_IN(MHz)
33.33
133
167
(PLL off, csb_clk clocks core directly)
PLL bypassed
VCO Divider
Freescale Semiconductor
66.67
133
 2
 4
 8
 8
 2
 4
 8
 8
 2
 4
 8
 8
 2
2
4
8
8