dp83848qsqx/nopb National Semiconductor Corporation, dp83848qsqx/nopb Datasheet - Page 53

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dp83848qsqx/nopb

Manufacturer Part Number
dp83848qsqx/nopb
Description
Phyter Extended Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
T2.1.1
T2.1.2
T2.1.3
Parameter
15.2 AC SPECIFICATIONS
15.2.1 Power Up Timing
Note: In RMII Mode, the minimum Post Power up Stabilization and Hardware Configuration Latch-in times are 84ms.
Post Power Up Stabilization time
prior to MDC preamble for register
accesses
Hardware Configuration Latch-in
Time from power up
Hardware Configuration pins
transition to output drivers
Description
MDIO is pulled high for 32-bit serial
management initialization
X1 Clock must be stable for a min.
of 167ms at power up.
Hardware Configuration Pins are
described in the Pin Description
section.
X1 Clock must be stable for a min.
of 167ms at power up.
Notes
53
Min
167
167
Typ
50
Max
30152520
www.national.com
Units
ms
ms
ns

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