dp83848qsqx/nopb National Semiconductor Corporation, dp83848qsqx/nopb Datasheet - Page 59
dp83848qsqx/nopb
Manufacturer Part Number
dp83848qsqx/nopb
Description
Phyter Extended Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
1.DP83848QSQXNOPB.pdf
(72 pages)
- Current page: 59 of 72
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T2.11.1
T2.11.2
T2.11.3
T2.12.1
T2.12.2
T2.12.3
Parameter
Parameter
15.2.11 10 Mb/s MII Transmit Timing
Note: An attached Mac should drive the transmit signals using the positive edge of TX_CLK. As shown above, the MII signals are sampled on the falling edge
15.2.12 10 Mb/s MII Receive Timing
Note: RX_CLK may be held low for a longer period of time during transition between reference and recovered clocks. Minimum high and low times will not be
of TX_CLK.
violated.
TX_CLK High/Low Time
TXD[3:0], TX_EN Data Setup to
TX_CLK fall
TXD[3:0], TX_EN Data Hold from
TX_CLK rise
RX_CLK High/Low Time
RX_CLK TO RXD[3:0}, RX_DV Delay
RX_CLK rising edge delay from RXD[3:0], RX_DV
Valid
Description
Description
10 Mb/s MII mode
10 Mb/s MII mode
10 Mb/s MII mode
Notes
10 Mb/s MII mode
10 Mb/s MII mode
59
Notes
Min
190
25
0
Min
160
100
100
Typ
200
30152530
30152531
Typ
200
Max
210
Max
240
www.national.com
Units
Units
ns
ns
ns
ns
ns
ns
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