adau1381 Analog Devices, Inc., adau1381 Datasheet - Page 16

• Manufacturer Part Number: adau1381
• Description: Low-noise Stereo Codec With Enhanced Recording And Playback Processing
• Manufacturer: Analog Devices, Inc.

ADAU1381
Table 10. Pin Function Descriptions
LFCSP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
A_OUT = analog output, A_IN = analog input, PWR = power, D_IO = digital input/output, D_OUT = digital output, and D_IN = digital input.
Pin No.
WLCSP
A6
C5
B6
C6
D6
E6
D5
C4
E5
C3
D4
E4
E3
D3
E2
C2
E1
D2
D1
C1
N/A
B1
A1
N/A
B2
A2
B3
A3
B4
A4
B5
A5
Mnemonic
CM
PDN
AGND1
AVDD1
DVDDOUT
DGND
GPIO
SCL/CCLK
SDA/COUT
ADDR0/CDATA
ADDR1/CLATCH
IOVDD
DAC_SDATA/GPIO0
ADC_SDATA/GPIO1
BCLK/GPIO2
LRCLK/GPIO3
MCKI
MCKO
AVDD2
SPN
NC
SPP
AGND2
NC
AOUTR
AOUTL
RMIC/RMICN/MICD2
RMICP
LMICP
LMIC/LMICN/MICD1
BEEP
MICBIAS
THERM_PAD
(Exposed Pad)
Type
A_OUT
A_IN
PWR
PWR
PWR
PWR
D_IO
D_IN
D_IO
D_IN
D_IN
PWR
D_IO
D_IO
D_IO
D_IO
D_IN
D_OUT
PWR
A_OUT
A_OUT
PWR
A_OUT
A_OUT
A_IN
A_IN
A_IN
A_IN
A_IN
PWR
1
Description
VDD/2 V Common-Mode Reference. A 10 μF to 47 μF decoupling capacitor should be
connected between this pin and ground to reduce crosstalk between the ADCs and
DACs. The material of the capacitors is not critical. This pin can be used to bias external
analog circuits, as long as they are not drawing current from CM (for example, the
noninverting input of an op amp).
Power-Down. Setting this pin to 0 powers down the chip. Resides in AVDD1 domain.
Analog Ground.
Analog Power Supply. Should be equivalent to AVDD2.
Digital Core Supply Decoupling Point. The digital supply is generated from an on-
board regulator and does not require an external supply. DVDDOUT should be
decoupled to DGND with a 100 nF capacitor.
Digital Ground.
Dedicated General-Purpose Input/Output.
I
I
I
I
Supply for Digital Input and Output Pins. The digital output pins are supplied from
IOVDD, which sets the highest allowed input voltage for the digital input pins. The
current draw of this pin is variable because it is dependent on the loads of the digital
outputs. IOVDD should be decoupled to DGND with a 100 nF capacitor.
DAC Serial Input Data/General-Purpose Input and Output.
ADC Serial Output Data/General-Purpose Input and Output.
Serial Data Port Bit Clock/General-Purpose Input and Output.
Serial Data Port Frame Clock/General-Purpose Input and Output.
Master Clock Input.
Master Clock Output.
Analog Power Supply. Should be equivalent to AVDD1.
Speaker Amplifier Negative Signal Output.
No Connect.
Speaker Amplifier Positive Signal Output.
Speaker Amplifier Ground.
No Connect.
Line Output Amplifier, Right Channel.
Line Output Amplifier, Left Channel.
Right Channel Input from Single-Ended Source/Right Channel Input from Negative
Pseudo Differential Source/Digital Microphone Input 2.
Right Channel Input from Positive Pseudo Differential Source.
Left Channel Input from Positive Pseudo Differential Source.
Left Channel Input from Single-Ended Source/Left Channel Input from Negative
Pseudo Differential Source/Digital Microphone Input 1.
Beep Signal Input.
Microphone Bias.
Exposed Pad. The exposed pad is connected internally to the ADAU1381 grounds. For
increased reliability of the solder joints and maximum thermal capability, it is
recommended that the pad be soldered to the ground plane.
2
2
2
2
C Clock/SPI Clock.
C Data/SPI Data Output.
C Address 0/SPI Data Input.
C Address 1/SPI Latch Signal.
Rev. A | Page 16 of 84