adau1381 Analog Devices, Inc., adau1381 Datasheet - Page 47

• Manufacturer Part Number: adau1381
• Description: Low-noise Stereo Codec With Enhanced Recording And Playback Processing
• Manufacturer: Analog Devices, Inc.

Table 33. Fractional PLL Parameter Settings for f
MCLK Input (MHz)
12
13
14.4
19.2
19.68
19.8
Table 34. Fractional PLL Parameter Settings for f
MCLK Input (MHz)
12
13
14.4
19.2
19.68
19.8
Input Divider (X)
1
1
1
1
1
1
Input Divider (X)
1
1
1
1
1
1
S
= 44.1 kHz (f
S
= 48 kHz (f
Integer (R)
3
3
3
2
2
2
Integer (R)
4
3
3
2
2
2
Rev. A| Page 47 of 84
S
= 44.1 kHz, Core Clock = 256 × 44.1 kHz, PLL Clock = 45.1584 MHz)
S
= 48 kHz, Core Clock = 256 × 48 kHz, PLL Clock = 49.152 MHz)
Denominator (M)
625
8125
125
125
2035
1375
Denominator (M)
125
1625
75
25
205
825
Numerator (N)
477
3849
17
44
302
386
Numerator (N)
12
1269
31
14
102
398
ADAU1381