isp1161bm NXP Semiconductors, isp1161bm Datasheet - Page 24
isp1161bm
Manufacturer Part Number
isp1161bm
Description
Isp1161 Full-speed Universal Serial Bus Single-chip Host And Device Controller
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1161BM.pdf
(137 pages)
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Philips Semiconductors
9. USB host controller (HC)
9397 750 09567
Product data
Fig 23. ISP1161 HC’s USB states.
USBOperational write
9.1 HC’s four USB states
9.2 Generating USB traffic
USBSuspend write
ISP1161’s USB HC has four USB states USB Operational, USB Reset, USB
Suspend, and USB Resume that define the HC’s USB signaling and bus states
responsibilities. The signals are visible to the HC (software) Driver via ISP1161 USB
HC’s control registers.
The USB states are reflected in the HostControllerFunctionalState field of the
HcControl register (01H - read, 81H - write), which is located at bits 7 and 6 of the
register.
The Host Controller Driver (HCD) can perform only the USB state transitions shown
in
Remark: The Software Reset in
command. It is caused by the HostControllerReset field of the HcCommandStatus
register (02H - read, 82H - write).
USB traffic can be generated only when the ISP1161 USB HC is under the USB
Operational State. Therefore, the HCD must set HostControllerFunctionalState field
of the HcControl register before generating USB traffic.
A simplistic flow diagram showing when and how to generate USB traffic is shown in
Figure
Revision 2.0 about the protocol and ISP1161 USB HC’s register usage.
Figure
USBOperational
USBSuspend
24. For greater accuracy, refer to both the Universal Serial Bus Specification
23.
Rev. 02 — 13 December 2002
USBResume write
remote wake-up
Full-speed USB single-chip host and device controller
USBResume
or
USBOperational write
Figure 23
USBReset write
is not caused by the HcSoftwareReset
USBReset write
USBReset write
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
hardware or software
USBReset
reset
MGT947
ISP1161
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