isp1505a NXP Semiconductors, isp1505a Datasheet - Page 6

• Manufacturer Part Number: isp1505a
• Description: Isp1505a; Isp1505c Ulpi Hi-speed Universal Serial Bus Host And Peripheral Transceiver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 2.
[1]
[2]
[3]
[4]
ISP1505A_ISP1505C_1
Product data sheet
Symbol
RESET_N/
PSW_N
REG1V8
DIR
STP
NXT
DATA7
DATA6
DATA5
DATA4
CLOCK
DATA3
V
DATA2
GND
CC(I/O)
Symbol names ending with underscore N, for example, NAME_N, indicate active LOW signals.
For details on external components required on each pin, see bill of materials and application diagrams in
I = input; O = output; I/O = digital input/output; AI = analog input; AO = analog output; AI/O = analog input/output; P = power or ground
pin.
A detailed description of these pins can be found in
[1][2]
Pin description
Pin
12
13
14
15
16
17
18
19
20
21
22
23
24
die pad
…continued
Type
I/O
P
O
I
O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
P
[3]
Description
This pin has two possible functions:
RESET_N (input) — Active LOW, asynchronous reset input.
3.3 V tolerant; plain input
PSW_N (output) — Active LOW external V
pump enable.
open-drain; 3.3 V tolerant
If not used, this pin must be connected to V
1.8 V regulator output
ULPI direction signal
slew-rate controlled output (1 ns)
ULPI stop signal
plain input; programmable pull up
ULPI next signal
slew-rate controlled output (1 ns)
pin 7 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 6 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 5 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
pin 4 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
60 MHz clock output when a crystal is attached; requires 60 MHz clock input when
the crystal is not attached
slew-rate controlled output (1 ns); plain input
pin 3 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
I/O supply rail
pin 2 of the bidirectional ULPI data bus
slew-rate controlled output (1 ns); plain input; programmable pull down
ground supply; down bonded to the exposed die pad (heat sink); to be connected to
the PCB ground
Rev. 01 — 19 October 2006
Section
[4]
7.10.
ULPI HS USB host and peripheral transceiver
ISP1505A; ISP1505C
BUS
CC(I/O)
power switch or external charge
.
Section
© NXP B.V. 2006. All rights reserved.
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