isp1562 NXP Semiconductors, isp1562 Datasheet - Page 30

• Manufacturer Part Number: isp1562
• Description: Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
9. I
ISP1562_2
Product data sheet
2
C-bus interface
9.1 Protocol
9.2 Hardware connections
A simple I
product ID and some other configuration bits from an external EEPROM.
The I
wires: SDA (data) and SCL (clock). Both lines are driven by open-drain circuits and must
be connected to the positive supply voltage through pull-up resistors when in use;
otherwise, they must be connected to ground.
The I
Each device on the I
device for access.
The master starts a data transfer using a START condition and ends it by generating a
STOP condition. Transfers can only be initiated when the bus is free. The receiver must
acknowledge each byte by using a LOW level on SDA during the ninth clock pulse on
SCL.
For detailed information, refer to The I
The ISP1562 can be connected to an external EEPROM through the I
The hardware connections are shown in
Fig 5. EEPROM connection diagram
•
•
•
•
Bus free: both SDA and SCL are HIGH
START: a HIGH-to-LOW transition on SDA, while SCL is HIGH
STOP: a LOW-to-HIGH transition on SDA, while SCL is HIGH
Data valid: after a START condition, data on SDA is stable during the HIGH period of
SCL; data on SDA may only change while SCL is LOW
2
2
C-bus interface is for bidirectional communication between ICs using two serial bus
C-bus protocol defines the following conditions:
2
C-bus interface is provided in the ISP1562 to read customized vendor ID,
USB HOST
ISP1562
2
C-bus has a unique slave address, which the master uses to select a
Rev. 02 — 1 March 2007
SDA
SCL
V
aux(3V3)
2
C-bus Specification Version 2.1 .
I
R P
2
C-bus
Figure
V
aux(3V3)
R P
5.
SCL
SDA
equivalent
EEPROM
HS USB PCI Host Controller
24C01
or
004aaa509
A0
A1
A2
2
C-bus interface.
© NXP B.V. 2007. All rights reserved.
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