mfrc52301hn1-trayb NXP Semiconductors, mfrc52301hn1-trayb Datasheet - Page 37
mfrc52301hn1-trayb
Manufacturer Part Number
mfrc52301hn1-trayb
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet
1.MFRC52301HN1-TRAYB.pdf
(98 pages)
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NXP Semiconductors
MFRC523_33
Product data sheet
PUBLIC
9.2.1.1 Reserved register 00h
9.2.1.2 CommandReg register
9.2.1.3 ComIEnReg register
9.2.1 Page 0: Command and status
9.2 Register descriptions
Functionality is reserved for future use.
Table 21.
Table 22.
Starts and stops command execution.
Table 23.
Table 24.
Control bits to enable and disable the passing of interrupt requests.
Table 25.
Bit
Symbol
Access
Bit
7 to 0
Bit
Symbol:
Access:
Bit
7 to 6 reserved
5
4
3 to 0 Command[3:0] -
Bit
Symbol
Access
Symbol
RcvOff
PowerDown
Symbol
-
Reserved register (address 00h); reset value: 00h bit allocation
Reserved register bit descriptions
CommandReg register (address 01h); reset value: 20h bit allocation
CommandReg register bit descriptions
ComIEnReg register (address 02h); reset value: 80h bit allocation
IRqInv
R/W
7
7
7
reserved
All information provided in this document is subject to legal disclaimers.
-
TxIEn
R/W
Value Description
-
1
1
0
6
Rev. 3.3 — 5 March 2010
6
6
Description
reserved
reserved for future use
analog part of the receiver is switched off
Soft Power-down mode entered
MFRC523 starts the wake up procedure during which this bit is
read as a logic 1; it is read as a logic 0 when the MFRC523 is
ready; see
Remark: The PowerDown bit cannot be set when the SoftReset
command is activated
activates a command based on the Command value; reading this
register shows which command is executed; see
page 69
RxIEn
115233
R/W
RcvOff
5
R/W
5
5
IdleIEn
Section 8.8.2 on page 32
R/W
PowerDown
4
4
D
reserved
4
HiAlertIEn LoAlertIEn
-
R/W
3
3
3
R/W
2
2
Command[3:0]
2
Contactless reader IC
MFRC523
D
© NXP B.V. 2010. All rights reserved.
ErrIEn
R/W
Section 10.3 on
1
1
1
TimerIEn
R/W
37 of 98
0
0
0
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