mfrc52301hn1-trayb NXP Semiconductors, mfrc52301hn1-trayb Datasheet - Page 45
mfrc52301hn1-trayb
Manufacturer Part Number
mfrc52301hn1-trayb
Description
Contactless Reader Ic
Manufacturer
NXP Semiconductors
Datasheet
1.MFRC52301HN1-TRAYB.pdf
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MFRC523_33
Product data sheet
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9.2.1.14 BitFramingReg register
9.2.1.15 CollReg register
Adjustments for bit-oriented frames.
Table 47.
Table 48.
Defines the first bit-collision detected on the RF interface.
Table 49.
Table 50.
Bit
Symbol
Access
Bit
7
6 to 4
3
2 to 0
Bit
Symbol
Access
Bit
7
6
5
Symbol
ValuesAfterColl
reserved
CollPosNotValid
Symbol
StartSend
RxAlign[2:0]
reserved
TxLastBits[2:0]
StartSend
ValuesAfterColl
BitFramingReg register (address 0Dh); reset value: 00h bit allocation
BitFramingReg register bit descriptions
CollReg register (address 0Eh); reset value: xxh bit allocation
CollReg register bit descriptions
W
7
R/W
All information provided in this document is subject to legal disclaimers.
7
Rev. 3.3 — 5 March 2010
6
Value Description
1
0
1
7
-
-
reserved
RxAlign[2:0]
6
-
115233
Value Description
0
-
1
starts the transmission of data
only valid in combination with the Transceive command
used for reception of bit-oriented frames: defines the bit
position for the first bit received to be stored in the FIFO buffer
example:
These bits are only to be used for bitwise anticollision at
106 kBd, for all other modes they are set to 0
reserved for future use
used for transmission of bit oriented frames: defines the
number of bits of the last byte that will be transmitted
000b indicates that all bits of the last byte will be transmitted
R/W
5
LSB of the received bit is stored at bit position 0, the second
received bit is stored at bit position 1
LSB of the received bit is stored at bit position 1, the second
received bit is stored at bit position 2
LSB of the received bit is stored at bit position 7, the second
received bit is stored in the next byte that follows at bit
position 0
CollPosNotValid
all received bits will be cleared after a collision
only used during bitwise anticollision at 106 kBd,
otherwise it is set to logic 1
reserved for future use
no collision detected or the position of the collision is
out of the range of CollPos[4:0]
R
5
4
reserved
3
-
4
3
2
CollPos[4:0]
Contactless reader IC
TxLastBits[2:0]
MFRC523
R
2
© NXP B.V. 2010. All rights reserved.
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