tda18219hn NXP Semiconductors, tda18219hn Datasheet - Page 6

• Manufacturer Part Number: tda18219hn
• Description: Silicon Tuner For Terrestrial And Cable Digital Tv Reception
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDA18219HN_1
Objective data sheet
9.1 RF filter
9.2 Crystal output mode
9.3 AGC description
Continuous gain control is performed after the RF filters and the IF selectivity. Stepped
AGC is available at all stages (LNA, RF filter, mixer and IF LPF) in order to optimize the
tuner signal-to-noise ratio. Gain settings of all stepped AGC and the RF AGC amplifier are
controlled by internal broadband level detectors. The steps in the different stages are
automatically compensated in IF with AGCK to keep a constant IF output level. The gain
of the IF AGC amplifier is controlled by the demodulator to take advantage of the full ADC
dynamic range.
A single LC-VCO operating at 7 GHz is used within a fractional-N phase lock-loop to
generate the LO frequency.The clock reference signal is provided by a crystal oscillator
and can be provided to a demodulator through the crystal output buffer.
All the programming is done via I
used for automatic calibration at power-on-reset.
The power level indicator can be used to indicate the RF input signal strengths of the
received channel.
The RF filter block is an alignment free tunable band-pass filter. After self calibration at
power-on to compensate for external and internal components spread, the center
frequency is automatically tuned to the desired frequency set via I
undesired interferers available on the broadband spectrum.
Pins XTOUT1 and XTOUT2 deliver a symmetrical sine waveform to drive the channel
demodulator. The load on these outputs should be made identical to ensure optimum
performance matching. Hence, if only one crystal output is used, the unused output must
be loaded by the same capacitance. The XTOUT output level can be set to either
400 mV (p-p) or 800 mV (p-p) single ended.
The tuner gain is composed of different variable gain stages spread according to block
diagram. Using the different detectors at different stages, the gain is distributed to offer
best linearity/noise compromise. The gain steps are 3 dB steps and in order to ensure
gain continuity a specific stage called AGCK aims at compensating these internal steps to
a minimum value. At the tuner output the gain variations appear to be continuous.
The tuner gain is externally controlled via IF AGC command (VIFAGC pin) provided to the
tuner to make sure the following ADC are used full scale. The RF gain is set automatically,
in accordance with the AGC TOP values.
The different stages gain values are then a combination of the following input parameters:
•
•
•
Input signal
TOP values set via I
IFAGC command
Rev. 01 — 3 February 2010
2
C-bus
Silicon Tuner for terrestrial and cable digital TV reception
2
C-bus transceiver. An embedded test tone generator is
TDA18219HN
2
C-bus to suppress the
© NXP B.V. 2010. All rights reserved.
6 of 49