sta002 STMicroelectronics, sta002 Datasheet - Page 26

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sta002

Manufacturer Part Number
sta002
Description
Starmano Channel Decoder
Manufacturer
STMicroelectronics
Datasheet

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STA002
6. REED SOLOMON DECODER
The STA 002 performs a real time block decoding
operation both on the Time Slot Control Channel
(TSCC) field and on the Broadcast Channel (BC)
stream by means of a programmable Reed-Solo-
mon (RS) decoder.
This decoder works on blocks of 255 words of 8
bit symbols where the first 223 words represent
the information and the last 32 the code redun-
dancy.
The synchrobyte is the first byte of the block.
All the correction capability of the code is used so
it is possible the correction of blocks containing
up to 16 errors while blocks with greater number
of errors are flagged as corrupted.
The RS decoder is programmable to support two
different Galois field generator polynomials as re-
quired by WorldSpace specifications and includes
an integrated BER estimator.
Monitoring the number of wrong words in each
block and correlating this number with the block
length, it is possible, provided that no corrupted
blocks are present, to get an estimation of the
signal quality at the Viterbi decoder output.
6.1 TSCC REED SOLOMON DECODER
The code generator polynomial is:
g(X) =
generated by X
6.2 BROADCAST CHANNEL RS DECODER
The code generator polynomial is:
g(x) = (x- °) (x-
over the Galois Field generated by:
X
6.3 ENERGY DISPERSAL DESCRAMBLER
The descrambler generator polynomial is:
X
Reg name: RS_ERROR_CONTROL
Internal address: 212H
Type: R/W
Reset Value: 00H
26/43
8
9
+X
+X
AND DESCRAMBLER.
4
5
J
+X
+1
143
112
3
+X
x
2
+1=0
8
11J
+X
1
) (...) (x-
7
+X
over the Galois Field
2
+X+1.
31
)
Description: Reed Solomon input errors measure-
ment windows length and error mode presettings
Reg name: RS_BYTE_ERROR1,
Internal address: 215 H , 216H
Type: R/W
RS_BYTE_ERR0R1 (ERROR COUNTER LOW)
RS_BYTE_ERROR
HIGH)
Description: RS byte error counter register
Reg name: RS_BLOCK_ERROR
Internal address: 217H
Type: R/W
Description: RS block error counter register
MSB
MSB
MSB
MSB
b1b0 =
b2
b2
b3
b3
b7
b7
X
X
=
=
=
=
b6
b6
X
X
00
01
10
11
0
1
0
1
RS_BYTE_ERROR2
b13
b5
b5
X
Monitor windows length (blocks)
3
64
256
1024
Error Measurement Mode
Single acquisition mode
Continuous acquisition mode
End measurement (single /continuous
acquisition
Single acquisition start
b12
b4
b4
X
2
b11
(ERROR
b3
b3
b3
b10
b2
b2
b2
COUNTER
b1
b1
b9
b1
LSB
LSB
LSB
LSB
b0
b0
b8
b0

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