at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 90

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at85c51snd3b

Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet

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Memory Management
90
AT85C51SND3B
When using this mode, there is no influence over the USB controller.
The controller only supports the following memory allocation management:
The reservation of a Pipe or an Endpoint can only be made in the growing order
(Pipe/Endpoint 0 to the last Pipe/Endpoint). The firmware shall thus configure them in
the same order.
The reservation of a Pipe or an Endpoint “k
the hardware allocates the memory and insert it between the Pipe/Endpoints “k
“k
and upper Pipe/Endpoint memory does not slide.
Clearing a Pipe enable (PEN) or an Endpoint enable (EPEN) does not clear neither its
ALLOC bit, nor its configuration (EPSIZE/PSIZE, EPBK/PBK). To free its memory, the
firmware should clear ALLOC. Then, the “k
“slides” down. Note that the “k
The following figure illustrates the allocation and reorganization of the USB memory in a
typical example:
Figure 54. Allocation and reorganization USB memory flow
i+1
”. The “k
EPEN=1
ALLOC=1
Pipe/Endpoints
Free m em ory
i+1
activation
” Pipe/Endpoint memory “slides” up and its data is lost. Note that the “k
5
4
3
2
1
0
Endpoint 1 to N
USB DPRAM
Endpoint 0
Unused
Pipe/Endpoint
Free m em ory
i+2
(ALLOC=1)
Disable
EPEN=0
” and upper Pipe/Endpoint memory does not slide.
5
4
2
1
0
i
[DPADDH
” is done when its ALLOC bit is set. Then,
i+1
Free its m em ory
Free m em ory
Lost m em ory
” Pipe/Endpoint memory automatically
(ALLOC=0)
5
4
2
1
0
DPADDL]
3 (bigger size)
Pipe/Endpoint
Free m em ory
Activatation
4
2
1
0
5
7632C–MP3–11/06
Conflict
i-1
” and
i+2

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