at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 94

• Manufacturer Part Number: at85c51snd3b
• Description: Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

ID Detection
Registers
USB general registers
94
AT85C51SND3B
The ID pin transition is detected thanks to the following architecture:
Figure 58. ID Detection Input Block Diagram
By default, (no A-plug or B-plug), the macro is in the Peripheral mode (internal pull-up).
The IDTI interrupt is triggered when a A-plug (Host) is plugged or unplugged. The inter-
rupt is not triggered when a B-plug (Peripheral) is plugged or unplugged.
The IDTI interrupt may be triggered even if the USB controller is disabled.
Table 102. USBCON Register
USBCON (1.E1h) – USB General Control Register
Number
USBE
3-2
Bit
7
7
6
5
4
1
UID
Mnemonic Description
OTGPADE
FRZCLK
HOST
HOST
USBE
IDTE
Bit
6
-
VDD
USB Controller Enable Bit
Set to enable the USB controller.
Clear to disable and reset the USB controller, to disable the USB transceiver and
to disable the USB controller clock inputs.
HOST Bit
Set to access to the Host registers.
Clear to access to the Device registers.
Freeze USB Clock Bit
Set to disable the clock inputs (the “Resume Detection” is still active) and save
power consumption.
Clear to enable the clock inputs.
OTG Pad Enable
Set to enable the OTG pad.
Clear to disable the OTG pad.
Note that this bit can be set/cleared even if USBE= 0 (this allows the VBUS
detection even if the USB macro is disable).
Reserved
The value read from these bits is always 0. Do not set these bits.
ID Transition Interrupt Enable Bit
Set this bit to enable the ID Transition interrupt generation.
Clear this bit to disable the ID Transition interrupt generation.
Internal Pull Up
FRZCLK
5
OTGPADE
USBSTA.1
4
ID
3
-
2
-
USBINT.1
IDTI
IDTE
1
7632C–MP3–11/06
VBUSTE
0