saa6712e NXP Semiconductors, saa6712e Datasheet - Page 20
saa6712e
Manufacturer Part Number
saa6712e
Description
Xga Rgb To Tft Graphics Engine
Manufacturer
NXP Semiconductors
Datasheet
1.SAA6712E.pdf
(64 pages)
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Philips Semiconductors
1999 Aug 25
General configuration
Clock distribution
Input interface
Colour correction
ADDRESS R/W
XGA RGB to TFT graphics engine
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
(1)
non_black_pixels[7 to 0]
por_mclk
pre_div_clock_p_high[3 to 0]
pre_div_clock_n_high[3 to 0]
post_div_clock_p_high[3 to 0]
post_div_clock_n_high[3 to 0]
not used
v_offset[7 to 0]
h_offset[7 to 0]
v_length[7 to 0]
h_length[7 to 0]
clamp_on[7 to 0]
clamp_off[7 to 0]
gainc_on_delay[7 to 0]
gainc_off_delay[7 to 0]
colour_index[7 to 0]
colour_value[7 to 0]
D7
intr_clear
pre_div_
enable
in_form_
on
D6
single_
adc_mode
post_div_
enable
D5
no_
memory_
mode
pre_div_
half_clock
adc_
sample_
seq
20
D4
non_black_pixels[11 to 8]
memory_
init
post_div_
half_clock
pre_div_clock_p_low[3 to 0]
pre_div_clock_n_low[3 to 0]
pre_div_clock_n_offs[3 to 0]
post_div_clock_p_low[3 to 0]
post_div_clock_n_low[3 to 0]
post_div_clock_n_offs[3 to 0]
gainc_pol
h_offset[11 to 8]
h_length[11 to 8]
red_prog
D3
reset_
input_path
frc_on
pll_enable pll_pclk
clamp_pol vs_pol
v_offset[10 to 8]
v_length[10 to 8]
green_
prog
D2
Preliminary specification
reset_
memory_
path
blank_
screen
blue_prog
D1
SAA6712E
reset_
proc_path
power_
down
pll_mclk
hs_pol
colour_
correction
_on
D0
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