pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 287

• Manufacturer Part Number: pef20550
• Description: Extended Line Card Interface Controller Elic
• Manufacturer: Infineon Technologies Corporation

To initialize two consecutive CFI timeslots for the decentral D-Channel handling scheme,
the CM codes as given in table 44 must be used.
Table 44
Control Memory Codes and Data for the Decentral D-Channel Handling Scheme
CM Address
Even timeslot downstream
Odd timeslot downstream
Even timeslot upstream
Odd timeslot upstream
Application hint:
Example
In CFI mode 0, timeslots 2 and 3 of port 3 are to be initialized for decentral D-Channel
handling:
W:MADR
W:MAAR
W:MACR
W:MADR
W:MAAR
W:MACR
W:MADR
W:MAAR
W:MACR
W:MADR
W:MAAR
W:MACR
Semiconductor Group
= 1100 0011
= 0000 1110
= 0111 1000
= XXXX XXXX
= 0000 1111
= 0111 1011
= 1111 1111
= 1000 1110
= 0111 1000
= XXXX XXXX
= 1000 1111
= 0111 0000
If the D-Channel is idle and if it is required to transmit a 2 bit idle
code in the D-Channel (e.g. during the layer-1 activation or for
testing purposes), the 6 bit signaling handling scheme can be
selected for the downstream direction. The 2 D bits together with
the 4 C/I bits can then be written to via the even control memory
address. If the high impedance state is needed again, the
decentral D-Channel scheme has to be selected again.
B
B
B
B
B
B
B
B
B
B
B
B
CM Code
1000
1011
1000
0000
; C/I value ‘0000’
; downstream even TS, port 3 timeslot 2
; write CM code + data fields, CM code ‘1000’
; don’t care
; downstream odd TS, port 3 timeslot 3
; write CM code + data fields, CM code ‘1011’
; expected C/I value ‘1111’
; upstream even TS, port 3 timeslot 2
; write CM code + data fields, CM code ‘1000’
; don’t care
; upstream odd TS, port 3 timeslot 3
; write CM code + data fields, CM code ‘0000’
287
CM Data
11 C/I 11
XXXXXXXX
XX C/I XX
XXXXXXXX
B
Application Hints
B
B
B
PEB 20550
PEF 20550
01.96