pef82902 Infineon Technologies Corporation, pef82902 Datasheet - Page 138
pef82902
Manufacturer Part Number
pef82902
Description
4b3t Second Generation Modular Isdn Nt Intelligent Extended
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF82902.pdf
(243 pages)
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The S/T interface level detector is enabled, i.e. if a level is detected this will be reported
by the Resynchronization Indication (RSY) but the loop function is not affected.
Depending on the DIS_TX bit in the S_CONF2 register the internal local loop can be
transparent or non transparent to the S/T line.
The external local loop (external Loop A) is activated in the same way as the internal
local loop described above. Additionally the EXLP bit in the S_CONF0 register has to be
programmed and the loop has to be closed externally as described in
The S/T interface level detector is disabled.
•
Figure 59
3.2.2
For loopback #2 several alternatives exist. Both the type of loopback and the location
may vary. The following loopback types belong to the loopback-#2 category:
• complete loopback (B1,B2,D), in the U-transceiver
• complete loopback (B1,B2,D), in a downstream device
• B1-channel loopback, always performed in the U-transceiver
• B2-channel loopback, always performed in the U-transceiver
All loop variations performed by the U-transceiver are closed as near to the internal
IOM
Normally loopback #2 is controlled by the exchange. The maintenance channel is used
for this purpose.
Data Sheet
â
-2 interface as possible.
Loopback No.2
External Loop at the S/T-Interface
SCOUT-S(X)
SX1
SX2
SR1
SR2
124
Operational Description
100
100
Figure
PEF 81902
2001-11-12
59.
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