pef82902 Infineon Technologies Corporation, pef82902 Datasheet - Page 195
pef82902
Manufacturer Part Number
pef82902
Description
4b3t Second Generation Modular Isdn Nt Intelligent Extended
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF82902.pdf
(243 pages)
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EN_CI1
EN_D
EN_B2H
EN_B1H
The bits EN_D, EN_B2H and EN_B1H are used to select the timeslot length for the D-
channel HDLC controller access as it is capable to access not only the D-channel
timeslot. The host can individually enable two 8-bit timeslots B1- and B2-channel, i.e.
the first and second octett, (EN_B1H, EN_B2H) and one 2-bit timeslot D-channel
(EN_D) on IOM-2. The position is selected via HCS.
DPS_H
HCS
Data Sheet
Enable CI1 Handler
0 =
1 =
Note: The timeslot for the C/I1 handler cannot be programmed but is fixed
Enable D-timeslot for HDLC controller
0 =
1 =
Enable B2-timeslot for HDLC controller
0 =
1 =
Enable B1-timeslot for HDLC controller
0 =
1 =
Data Port Selection HDLC
0 =
1 =
HDLC Channel Selection
These two bits determine the IOM
HDLC controller will read and write HDLC data into the selected B1, B2 and
D channel timeslots of the selected IOM
00 =
01 =
to IOM channel 1.
CI1 data access is disabled
CI1 data access is enabled
The HDLC controller does not access timeslot data D
The HDLC controller does access timeslot data D
The HDLC controller does not access timeslot data B2
The HDLC controller does access timeslot data B2
The HDLC controller does not access timeslot data B1 respectively
The HDLC controller does access timeslot data B1
Transmit on DD, receive on DU
Transmit on DU, receive on DD
The HDLC data is read and output on IOM-channel 0
The HDLC data is read and output on IOM-channel 1
181
®
-2 channel of the HDLC controller. The
®
-2 channel.
Register Description
PEF 81902
2001-11-12
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