tc58v64bft TOSHIBA Semiconductor CORPORATION, tc58v64bft Datasheet - Page 19

• Manufacturer Part Number: tc58v64bft
• Description: 64-mbit Bits Cmos Nand E2prom
• Manufacturer: TOSHIBA Semiconductor CORPORATION

mode (3) outputs the contents of the redundant address locations only. When the pointer reaches the last address,
the device continues to output the data from this address ** on each RE clock signal.
RY
Sequential Read modes (1) and (2) output the contents of addresses 0~527 as shown above, while Sequential Read
CLE
ALE
Read Mode (3)
16-byte redundancy area of the page. The start pointer is therefore set to a value between byte 512 and byte 527.
Sequential Read (1) (2) (3)
/
WE
RE
CE
BY
I/O
Read mode (3) has the same timing as Read modes (1) and (2) but is used to access information in the extra
This mode allows the sequential reading of pages without additional address input.
** Column address 527 on the last page.
RY
00H
01H
50H
/
BY
50H
(00H)
Figure 5. Read mode (3) operation
0
Sequential Read (1)
Address input
A
512
A0~A3
527
Busy
t
R
527
(01H)
Busy
Sequential Read (2)
Data output
A
redundant memory cells, while A4~A7 are ignored.
Once a 50H command has been issued, the pointer moves to
the redundant cell locations and only those 16 cells can be
addressed, regardless of the value of the A4-to-A7 address. (An
00H command is necessary to move the pointer back to the
0-to-511 main memory cell location.)
Addresses bits A0~A3 are used to set the start pointer for the
Busy
t
R
Data output
(50H)
Sequential Read (3)
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512 527
TC58V64BFT
A
Busy
t
R