l99pm62gxp STMicroelectronics, l99pm62gxp Datasheet - Page 17

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l99pm62gxp

Manufacturer Part Number
l99pm62gxp
Description
Power Management Ic With Lin And High Speed Can
Manufacturer
STMicroelectronics
Datasheet

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L99PM62GXP
2.2.2
Note:
2.2.3
Note:
Flash mode
To program the system microcontroller, the L99PM62 can be operated in Flash mode where
the internal watchdog is disabled. This mode can also be used for software debugging.
Except for the disabled watchdog, the Flash mode is identical to active mode and all device
features are available.
A transition from Flash mode to V
The mode can be entered if one of the following conditions is applied:
At exit from Flash mode (V
starts with a long open window.
Setting both TxDL and TxDC to high voltage levels (> V
Communication at the respective TxD pin is not possible.
V
The transition from active mode to V
To supply the micro controller in a low power mode, the voltage regulator 1 (V
active. In order to reduce the current consumption, the regulator goes in low current mode
as soon as the supply current of the microcontroller goes below the I
At this transition, the L99PM62 also deactivates the internal watchdog.
Relay outputs, LIN and CAN transmitters is switched off in V
outputs and the V
command.
A cyclic supply of external contacts and a synchronized monitoring of the contact state can
be activated and configured by SPI.
In V
up event puts the device into active mode and forces the RxDL/NINT pin to a low level
indicating the wake-up condition to the microcontroller.
After power ON reset (POR) all wake up sources are activated by default except the periodic
interrupt/wake timer.
With the interrupt timer the micro controller can be forced from ‘stop’ to ‘run’ after a
programmable period. The RxDL/NINT pin is forced low after the timer is elapsed. The
L99PM62GXP enters active mode and is awaiting a valid watchdog trigger.
Both internal timers can be used for this feature.
The interrupt timer (T
Inputs TxDL, TxDC and CSN must be at high level or at high impedance in order to achieve
minimum standby current in V
Inputs DI and CLK must be at GND or at high impedance to achieve minimum standby
current in V
1
standby mode
1
V
V
standby mode various wake up sources can be individually programmed. Each wake
TxDL
TxDC
> V
> V
1
standby mode.
Flash
Flash
2
regulator remain in the configuration programmed prior to the standby
INT
) at pin RxDL/NINT is only available in V
TxD
1
Doc ID 17639 Rev 3
< V
standby mode.
1stby
Flash
1
standby mode is controlled by SPI.
or V
) no NReset pulse is generated and the watchdog
batstby
is not possible.
Flash
) is not allowed.
1
standby mode. High-side
1
standby mode.
cmp
Detailed description
current threshold.
1
) remains
17/102

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