tmp88ps42ng TOSHIBA Semiconductor CORPORATION, tmp88ps42ng Datasheet - Page 131
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tmp88ps42ng
Manufacturer Part Number
tmp88ps42ng
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88PS42NG.pdf
(226 pages)
- Current page: 131 of 226
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Example :Generating a pulse with 1-ms high-level width and a period of 16.385 ms (fc = 20.0 MHz)
12.3.8 16-Bit Programmable Pulse Generate (PPG) Output Mode (TC5 and 6)
able to enter the 16-bit PPG mode.
the timer register (PWREG5, PWREG6) value is detected, the logic level output from the timer F/F6 is
switched to the opposite state. The counter continues counting. The logic level output from the timer F/F6 is
switched to the opposite state again when a match between the up-counter and the timer register (TTREG5,
TTREG6) value is detected, and the counter is cleared. The INTTC6 interrupt is generated at this time.
generated. Upon reset, the timer F/F6 is cleared to 0.
PWREG5 → PWREG6) (Programming only the upper or lower byte should not be attempted.)
This mode is used to generate pulses with up to 16-bits of resolution. The timer counter 5 and 6 are cascad-
The counter counts up using the internal clock or external clock. When a match between the up-counter and
Since the initial value can be set to the timer F/F6 by TC6CR<TFF6>, positive and negative pulses can be
(The logic level output from the
Set the lower byte and upper byte in this order to program the timer register. (TTREG5 → TTREG6,
For PPG output, set the output latch of the I/O port to 1.
Note 1: In the PPG mode, do not change the PWREGi and TTREGi settings while the timer is running. Since
Note 2: When the timer is stopped during PPG output, the
Note 3: i = 5, 6
PWREGi and TTREGi are not in the shift register configuration in the PPG mode, the new values pro-
grammed in PWREGi and TTREGi are in effect immediately after programming PWREGi and TTREGi.
Therefore, if PWREGi and TTREGi are changed while the timer is running, an expected operation may not
be obtained.
stopped. To change the output status, program TC6CR<TFF6> after the timer is stopped. Do not change
TC6CR<TFF6> upon stopping of the timer.
Example: Fixing the
CLR (TC6CR).3: Stops the timer
CLR (TC6CR).7: Sets the
LDW
LDW
LD
LD
LD
PPG
Setting ports
(PWREG5), 07D0H
(TTREG5), 8002H
(TC5CR), 33H
(TC6CR), 057H
(TC6CR), 05FH
6 pin to the high level when the TimerCounter is stopped
PPG
PPG
6 pin is the opposite to the timer F/F6.)
6 pin to the high level
Page 121
: Sets the pulse width.
: Sets the cycle period.
: Sets the operating clock to fc/2
: Sets TFF6 to the initial value 0, and 16-bit
: Starts the timer.
(lower byte).
PPG mode (upper byte).
PPG
6 pin holds the output status when the timer is
3
, and16-bit PPG mode
TMP88PS42NG
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