uaa2077am NXP Semiconductors, uaa2077am Datasheet - Page 4

• Manufacturer Part Number: uaa2077am
• Description: Image Rejecting Front-end For Dect Applications
• Manufacturer: NXP Semiconductors

Philips Semiconductors
PINNING
FUNCTIONAL DESCRIPTION
Receive section
The circuit contains a low-noise amplifier followed by two
high dynamic range mixers. These mixers are of the
Gilbert-cell type, the whole internal architecture is fully
differential.
The local oscillator, shifted in phase to 45 and 135 ,
mixes the amplified RF to create I and Q channels.
The two I and Q channels are buffered, phase shifted by
45 and 135 respectively, amplified and recombined
internally to realize the image rejection.
Pin SBS allows sideband selection:
where f
1996 Jul 04
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V
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RFINA
RFINB
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LNAGND
SXON
V
SBS
RXON
LOINB
LOINA
V
LOGND
IFA
IFB
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SYMBOL
f
f
CCLNA
QUADLO
CCLO
Image rejecting front-end
for DECT applications
LO
LO
> f
< f
RF
RF
RF
is the frequency of the wanted signal.
(SBS = 1)
(SBS = 0).
PIN
10
12
13
14
15
16
17
18
19
20
11
1
2
3
4
5
6
7
8
9
not connected
not connected
supply voltage for LNA and IF parts
not connected
RF input A (balanced)
RF input B (balanced)
not connected
ground for LNA and IF parts
SX mode enable (see Table 1)
input voltage for LO quadrature
trimming
sideband selection
RX mode enable (see Table 1)
LO input B (balanced)
LO input A (balanced)
supply voltage for LO parts
ground for LO parts
IF output A (balanced)
IF output B (balanced)
not connected
not connected
DESCRIPTION
4
Balanced signal interfaces are used for minimizing
crosstalk due to package parasitics.
The IF output is differential and of the open-collector type.
Typical application will load the output with a differential
1 k
output, plus a differential 2 k
impedance of the IF filter or the input impedance of the
matching network for the IF filter. The power gain refers to
the available power on this 2 k load. The path to V
the DC current should be achieved via tuning inductors.
The output voltage is limited to V
forward voltage drops.
Fast switching, on/off, of the receive section is controlled
by the hardware input RXON.
handbook, halfpage
load; for example, a 1 k
V QUADLO
LNAGND
V CCLNA
RFINA
RFINB
SXON
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Fig.2 Pin configuration.
10
1
2
3
4
5
6
7
8
9
UAA2077AM
MBH151
load consisting of the input
resistor load at each IF
20
19
18
17
16
15
14
13
12
11
UAA2077AM
CC
Product specification
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IFB
IFA
LOGND
V CCLO
LOINA
LOINB
RXON
SBS
+ 3V
be
or 3 diode
CC
for