tc9444f TOSHIBA Semiconductor CORPORATION, tc9444f Datasheet - Page 21

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tc9444f

Manufacturer Part Number
tc9444f
Description
Single-chip Karaoke Ic Ii
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
6. Reset Timing
7. Microcontroller Interface Signal Timing
7.1
7.2
After turning on the power supply, always perform a reset by setting the /RESET pin to Low.
Figure 6. shows the reset and boot timing.
When performing a power-on reset, note the timing shown in Figure 6.2.
Microcontroller interface signal timing supports three-lead mode and I
Three-Lead Bus Mode
As coefficient or offset RAM cannot be updated in multiple-word batches, take particular care when
updating filter coefficients.
I
the chip select signal.
then a START condition to start writing data again.
2
C Bus Mode
Setting IFSEL = “H” sets the microcontroller interface to three-lead bus mode.
Setting the CS signal = “L” enables control from the microcontroller.
Figure 7. shows the interface timing when three-lead mode is selected.
When transmitting two or more commands, be sure to set CS to H between each command.
When writing to coefficient or offset RAM, be sure to write the data word by word in  fs per word.
Setting IFSEL = “L” sets the microcontroller interface to I
In I
The I
Data can only be written to this address. Therefore, fix the LSB of read/write mode bits to 0.
As I
RESET
2
2
MSB
C bus mode, the CS pin can be fixed to “L”. Note that the CS pin signal can also be used as
C bus mode does not permit continuous writing, insert an END condition after each command,
2
C slave address is:
0
^^^^^^^^^^^^^
V
RESET
000
DD
t
Figure 6.2 Power-On Reset Timing
Rw
LSB
> 0.2 ms
Figure 6.1 Reset and Boot
80%
21
t
t
RST
BOOT
> 1 ms
< 50 ms
40%
2
C bus mode.
Boot operation completed. Do not write to
the coefficient or offset RAM until boot is
complete.
2
C bus mode.
2002-01-11
TC9444F

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