tc9444f TOSHIBA Semiconductor CORPORATION, tc9444f Datasheet - Page 5

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tc9444f

Manufacturer Part Number
tc9444f
Description
Single-chip Karaoke Ic Ii
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
Block Operations
1. Operating Clocks
2. Digital Audio Data Input/Output
Table 1.1 Operating Clock Selection and DA Converter Oversampling Rate
2.1
oscillator or external clock input, through the XI pin.
the DA converter’s operating clock varies according to the master clock mode.
The master clock can be selected between 52 or 384 fs using the CKS pin. The master clock uses
Regardless of a master clock, the number of digital signal processing steps are predetermined. However,
The MCKS pin sets the MCKO output, selecting / or /2 divider of the XI pin.
Sync Mode
set using microcontroller interface bits SYNM and SYNM2. Initialization by reset sets master mode.
The data input/output bit clock and internal sync (master) mode or external sync (slave) mode are
Table 2.1 Sync Mode and Input/Output Bit Clock Settings
CKS Pin
H
L
Note 1: See Table 2.2.
Note 2: XI input divider clock
SYNM2
0
0
1
1
MCKS Pin
H
H
L
L
SYNM1
0
1
0
1
XI Input
384 fs
512 fs
SYNC Mode
Master
Slave
Slave
Slave
5
MCKO Output
192 fs
384 fs
256 fs
512 fs
BCKI
32 fs
48 fs
64 fs
(Note 1)
DAC Oversampling Rate
192 fs
256 fs
BCKO
BCKI
BCKI
BCKI
64 fs
(Note 2)
2002-01-11
TC9444F

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