pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 177

• Manufacturer Part Number: pxf4336
• Description: Abm Premium Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

5.5
Support of ABR-ER and ABR-VS/VD requires firmware that is provided by an external
EEPROM. Via the SPI interface the ERC subsystem firmware can be loaded into the
internal code RAM during start-up of the device.The SPI Interface supports EEPROMs
with an 8-bit address space. After a system reset, the ABM-P starts reading out the
memory contents. Every time four bytes are read out of the EEPROM (starting with byte
address 00
Table 5-13
Table 5-13
Type
1
5.5.1
The ABM-P selects an external EEPROM by pulling SPICS low. The 8-bit read sequence
is transmitted followed by the 8-bit address. After the read instruction and address is
sent, the data stored in the memory at the selected address is shifted in on the SPISI pin.
The read operation is terminated by setting SPICS high (see
•
Figure 5-9
5.6
The Queue Congestion Indication Interface provides threshold crossing information of
up to 8k queues of the downstream core. Dedicated queue specific thresholds are
internally supervised using a hysteresis. The threshold exceed information is stored in a
bit pattern that is accessible via the QCI Interface in a basic HDLC framing.
The QCI Interface supports two modes:
Data Sheet
SPCLK
SPCS
SPSO
SPSI
STMicroelectronics M95256
H
SPI: Serial Peripheral Interface
SPI Read Sequence
QCI: Queue Congestion Indication Interface
gives an example of supported EEPROMs:
), the ABM-P writes the read information into the code RAM.
Serial SPI Bus EEPROM Type Example
SPI Read Sequence
0
0
1
0
2
0
instruction
3
0
4
0
5
0
6
1
7
1
177
8
7
9
8 bit address
6
14 15 16 17 18 19 20 21 22 23
0
Configuration
32k * 8
7
Figure
6
Interface Description
5
data in
4
5-9).
PXF 4336 V1.1
3
2
1
2001-12-17
ABM-P
0