pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 300

• Manufacturer Part Number: pxf4336
• Description: Abm Premium Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

Table 7-21
63
Table 7-22
63
Internal Table 9: Queue Parameter Table 2 Transfer Registers
Queue Parameter Table Transfer Registers are used to access the internal Upstream
and Downstream Queue Parameter Table 2 (QPT2) containing 8192 entries each. In
both
QPT2 entry consists of 64 bits.
•
UQPT2T0..UQPT2T3 are the transfer registers for the 64-bit entry of the upstream QPT2
table. DQPT2T0..DQPT2T3 are the transfer registers for the 64-bit entry of the
downstream QPT2 table. Access to the RAM entry is controlled by mask registers
UQPTM0..UQPTM3 and DQPTM0..DQPTM3, respectively. The Mask registers are
shared for access to both tables QPT1 and QPT2 whereas the transfer registers are
unique for each table.
The queue number representing the table entry which needs to be read or written must
be written to the Word Address Register (WAR). The dedicated QPT2 table entry is read
into the xQPT2T0..xQPT2T3 transfer registers (x=U,D) or modified by the
xQPT2T0..xQPT2T3 transfer register values with a write mechanism. The associated
mask registers xQPTM0..xQPTM3 allow a bit-wise Write operation (0 - unmasked, 1 -
Data Sheet
15
15
15
15
UQPT2T3
DQPT2T3
UQPTM3
DQPTM3
Table 7-21
0 15
0 15
0 15
0 15
Registers for QPT2 Upstream Table Access
Registers for QPT2 Downstream Table Access
QPT2 RAM entry ( Down stream)
QPT2 RAM entry ( Up stream)
and
UQPT2T2
DQPT2T2
UQPTM2
DQPTM2
Table 7-22
0 15
0 15
0 15
0 15
provide an overview of the registers involved. Each
UQPT2T1
DQPT2T1
UQPTM1
DQPTM1
300
0 15
0 15
0 15
0 15
UQPT2T0
DQPT2T0
UQPTM0
DQPTM0
0
0
0
0
0
0
Register Description
15
15
15
15
WAR (0..8191
WAR (0..8191
PXF 4336 V1.1
RAM Select:
Entry Select:
RAM Select:
Entry Select:
MAR=11
MAR=19
2001-12-17
ABM-P
H
H
D
D
)
)
0
0
0
0