pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 229

• Manufacturer Part Number: pxf4336
• Description: Abm Premium Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

7.2.8
Register 30 DQCIC
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
FSEN
BSEN
BPLEN(1:0)
Data Sheet
FSEN
15
7
QCI Control Registers
Downstream Queue Congestion Indication Control Register
BSEN
14
6
Frame Sync Enable
This bit enables frame sync operation controlled by signal
‘QCITXFRAME’.
0
1
Bit-Stuffing Enable
This bit enables HDLC bit-stuffing within the transmission pattern.
0
1
Bit-Pattern Length
This bit field determines the bit pattern payload length depending on
the number of queues that need to be monitored.
00
01
Read/Write
0080
DQCIC
Written by CPU
H
13
BPLEN(1:0)
5
Frame Sync Operation disabled. Input signal
‘QCITXFRAME’ is ignored.
Frame Sync Operation enabled.
An active high edge at input signal ‘QCITXFRAME’
starts transmission of a new pattern.
Bit-stuffing disabled.
Bit-stuffing enabled.
1k bits (queues 0..1023 are monitored)
2k bits (queues 0..2047 are monitored)
35
12
H
4
Unused(15:8)
229
11
3
10
2
QCIHYS(3:0)
Register Description
9
1
PXF 4336 V1.1
2001-12-17
ABM-P
8
0