p87c770aar NXP Semiconductors, p87c770aar Datasheet - Page 23

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p87c770aar

Manufacturer Part Number
p87c770aar
Description
Microcontrollers Ntsc With On-screen Display Closed Caption
Manufacturer
NXP Semiconductors
Datasheet

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11.3
Each interrupt source can be assigned one of two priority
levels. Interrupt priority levels are defined by the Interrupt
Priority Registers (IP0 and IP1). These registers are
described in Sections 11.3.1 and 11.3.2.
A low priority interrupt may be interrupted by a high priority
interrupt level interrupt. A high priority interrupt routine
cannot be interrupted by any other interrupt source. If two
interrupts of different priority occur simultaneously, the
high priority level request is serviced. If requests of the
same priority are received simultaneously, an internal
polling sequence determines which request is serviced.
Thus, within each priority level, there is a second priority
structure determined by the polling sequence. This second
priority structure is shown in Table 25.
11.3.1
Table 26 Interrupt Priority Register 0 (SFR address B8H)
Table 27 Description of IP0 bits
Note
1. Where: logic 0 = low priority; logic 1 = high priority.
1999 Jun 11
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
BIT
7 to 6
7
5
4
3
2
1
0
Interrupt priority structure
(1)
I
NTERRUPT
SYMBOL
P
PS1
PT1
PX1
PT0
PX0
RIORITY
6
R
This bit is not used, program to a logic 0 for future compatibility reasons.
I
This bit is not used, program to a logic 0 for future compatibility reasons.
Timer 1 interrupt priority level.
External interrupt 1 priority level.
Timer 0 interrupt priority level.
External interrupt 0 priority level.
EGISTER
2
C-bus SIO interrupt priority level.
PS1
5
0 (IP0)
4
23
Table 25 Interrupt priority
Note
1. The ‘priority within level’ structure is only used to
PT1
resolve simultaneous requests of the same priority
level.
3
DESCRIPTION
SOURCE
I
Timer 0
Timer 1
2
BUSY
INT0
INT1
C-bus
CC
PX1
2
PRIORITY WITHIN LEVEL
P8xCx70 family
PT0
1
highest
Product specification
lowest
PX0
0
(1)

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