p87c770aar NXP Semiconductors, p87c770aar Datasheet - Page 29

• Manufacturer Part Number: p87c770aar
• Description: Microcontrollers Ntsc With On-screen Display Closed Caption
• Manufacturer: NXP Semiconductors

Philips Semiconductors
14 PIN FUNCTION SELECTION
Ports 0, 1 and 3 are dual purpose ports and can be
configured as port lines or selected as alternative
functions. Selection of the pin as a port line or alternative
function is achieved using the appropriate SFR as
described in Sections 14.1, 14.2.1 and 14.3.
14.1
Port 0 is an 8-bit port which can be configured as eight
bidirectional port lines (P0.0 to P0.7) or as eight 7-bit PWM
outputs (PWM1 to PWM8).
Each 7-bit PWM output can be selected by setting the
PWMnE bit in its associated PWMn register to a logic 1
(see Section 15.1). When using these pins as PWM
outputs, the system software needs to keep track of its I/O
status and avoid reading from these ports.
14.2.1
Table 35 Port 1 Selection Register (SFR address F4H)
Table 36 Description of P1SEL bits
1999 Jun 11
Microcontrollers for NTSC TVs with On-Screen
Display (OSD) and Closed Caption (CC)
BIT
7
7
6
5
4
3
2
1
0
Port 0 pin function selection
P
ORT
1 S
SYMBOL
ELECTION
AFT2E
AFT1E
AFT0E
I
2
CE
6
R
EGISTER
These 3 bits are reserved.
When I
respectively. When I
and P3.5 respectively.
This bit is not used.
When AFT2E = 1, pin 11 is selected as AFT2 input. When AFT2E = 0, pin 11 is selected
as general I/O port line P1.2.
When AFT1E = 1, pin 10 is selected as AFT1 input. When AFT1E = 0, pin 10 is
selected as general I/O port line P1.1.
When AFT0E = 1, pin 9 is selected as AFT0 input. When AFT0E = 0, pin 9 is selected
as general I/O port line P1.0.
5
2
(P1SEL)
CE = 1, pins 49 and 50 are enabled as alternative functions SCL and SDA
I
2
2
4
CE
CE = 0, pins 49 and 50 are enabled as general I/O port lines P3.4
29
When using these pins as general I/O port lines
(PWMnE = 0), writing is done to the P0 latch and reading
at either the P0 latch or the port pins. No special control is
required for this selection.
14.2
Port 1 is a 4-bit port which can be configured as four
bidirectional port lines (P1.0 to P1.3) or as three AFT
inputs (AFT0 to AFT2) and one 7-bit PWM output
(PWM0).
The AFT inputs are selected using the Port 1 Selection
Register (P1SEL) as described in Section 14.2.1. This
register also selects the I
P3.5. The PWM function of the P1.3/PWM0 pin is enabled
by setting the PWM0E bit in SFR PWM0 to a logic 1.
3
DESCRIPTION
Port 1, P3.4 and P3.5 pin function selection
AFT2E
2
2
C-bus functions of P3.4 and
P8xCx70 family
AFT1E
1
Product specification
AFT0E
0