lpc2210fbd144-01 NXP Semiconductors, lpc2210fbd144-01 Datasheet - Page 18

• Manufacturer Part Number: lpc2210fbd144-01
• Description: 16/32-bit Arm Microcontroller With 10-bit Adc And External Memory Interface
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2210_2220_5
Product data sheet
6.5 Pin connect block
6.6 Pin function select register 0 (PINSEL0 - 0xE002 C000)
The pin connect block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the
pin and the on chip peripherals. Peripherals should be connected to the appropriate pins
prior to being activated, and prior to any related interrupt(s) being enabled. Activity of any
enabled peripheral function that is not mapped to a related pin should be considered
undefined.
The pin control module contains three registers as shown in
Table 6.
The PINSEL0 register controls the functions of the pins as per the settings listed in
Table
function is selected for a pin. For other functions, direction is controlled automatically.
Settings other than those shown in
Table 7.
Address
0xE002 C000
0xE002 C004
0xE002 C014
PINSEL0
1:0
3:2
5:4
7:6
9:8
7. The direction control bit in the IODIR register is effective only when the GPIO
Pin control module registers
Pin function select register 0 (PINSEL0 - 0xE002 C000)
Pin name
P0.0
P0.1
P0.2
P0.3
P0.4
Name
PINSEL0
PINSEL1
PINSEL2
Rev. 5 — 20 December 2007
16/32-bit ARM microcontrollers with external memory interface
Value
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Table 7
Description
pin function select register 0
pin function select register 1
pin function select register 2
are reserved, and should not be used
Function
GPIO Port 0.0
TXD0 (UART0)
PWM1
reserved
GPIO Port 0.1
RXD0 (UART0)
PWM3
EINT0
GPIO Port 0.2
SCL (I
Capture 0.0 (Timer 0)
reserved
GPIO Port 0.3
SDA (I
Match 0.0 (Timer 0)
EINT1
GPIO Port 0.4
SCK (SPI0)
Capture 0.1 (Timer 0)
reserved
2
2
C-bus)
C-bus)
LPC2210/2220
Table
6.
Value after reset
0
0
0
0
0
© NXP B.V. 2007. All rights reserved.
Access
read/write
read/write
read/write
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