lpc2210fbd144-01 NXP Semiconductors, lpc2210fbd144-01 Datasheet - Page 26

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lpc2210fbd144-01

Manufacturer Part Number
lpc2210fbd144-01
Description
16/32-bit Arm Microcontroller With 10-bit Adc And External Memory Interface
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC2210_2220_5
Product data sheet
6.16.1 Features
6.16.2 Features available in LPC2210/01 and LPC2220 only
6.16 General purpose timers
While the SSP and SPI1 peripherals share the same physical pins, it is not possible to
have both of these two peripherals active at the same time. Application can switch on the
fly from SPI1 to SSP and back.
The timer/counter is designed to count cycles of the peripheral clock (PCLK) or an
externally supplied clock and optionally generate interrupts or perform other actions at
specified timer values, based on four match registers. It also includes four capture inputs
to trap the timer value when an input signal transitions, optionally generating an interrupt.
Multiple pins can be selected to perform a single capture or match function, providing an
application with ‘or’ and ‘and’, as well as ‘broadcast’ functions among them.
The LPC2210/01 and LPC2220 can count external events on one of the capture inputs if
the external pulse lasts at least one half of the period of the PCLK. In this configuration,
unused capture lines can be selected as regular timer capture inputs or used as external
interrupts.
A 32-bit timer/counter with a programmable 32-bit prescaler.
Timer operation (LPC2210/2220) or external event counter (LPC2210/01 and
LPC2220 only).
Four 32-bit capture channels per timer/counter that can take a snapshot of the timer
value when an input signal transitions. A capture event may also optionally generate
an interrupt.
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Four external outputs per timer/counter corresponding to match registers, with the
following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
Timer can count cycles of either the peripheral clock (PCLK) or an externally supplied
clock.
When counting cycles of an externally supplied clock, only one of the timer’s capture
inputs can be selected as the timer’s clock. The rate of such a clock is limited to
PCLK / 4. Duration of high/low levels on the selected capture input cannot be shorter
than 1 / (2PCLK).
Rev. 5 — 20 December 2007
16/32-bit ARM microcontrollers with external memory interface
LPC2210/2220
© NXP B.V. 2007. All rights reserved.
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