lpc2917 NXP Semiconductors, lpc2917 Datasheet - Page 38

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lpc2917

Manufacturer Part Number
lpc2917
Description
Arm9 Microcontroller With Can And Lin
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC2917_19_1
Preliminary data sheet
8.7.6.3 Synchronizing the PWM counters
The PWM block diagram in
functionality is split into two major parts, a VPB domain and a PWM domain, both of which
run on clocks derived from the BASE_MSCSS_CLK. This split into two domains affects
behavior from a system-level perspective. The actual PWM and prescale counters are
located in the PWM domain but system control takes place in the VPB domain.
The actual PWM consists of two counters; a 16-bit prescale counter and a 16-bit PWM
counter. The position of the rising and falling edges of the PWM outputs can be
programmed individually. The prescale counter allows high system bus frequencies to be
scaled down to lower PWM periods. Registers are available to capture the PWM counter
values on external events.
Note that in the Modulation and Sampling SubSystem, each PWM has its individual clock
source CLK_MSCSS_PWMx (x runs from 0 to 3). Both the prescale and the timer
counters within each PWM run on this clock CLK_MSCSS_PWMx, and all time references
are related to the period of this clock. See
these clocks.
A mechanism is included to synchronize the PWM period to other PWMs by providing a
sync input and a sync output with programmable delay. Several PWMs can be
synchronized using the trans_enable_in/trans_enable_out and sync_in/sync_out ports.
See
in the LPC2917/19. PWM 0 can be master over PWM 1; PWM 1 can be master over
PWM 2, etc.
Fig 10. PWM block diagram
VPB system bus
IRQ capt_match
Automotive dimmer controller: The flexibility of providing waves of a desired duty
cycle and cycle period allows the PWM to control the amount of power to be
transferred to the load. The PWM functions as a dimmer controller in this application
Motor controller: The PWM provides multi-phase outputs, and these outputs can be
controlled to have a certain pattern sequence. In this way the force/torque of the
motor can be adjusted as desired. This makes the PWM function as a motor drive.
Section 8.7.2.1
IRQ pwm
VPB domain
for details of the connections of the PWM modules within the MSCSS
Rev. 1.01 — 15 November 2007
registers
control
PWM
&
Figure 10
PWM counter value
Capture data
Config data
update
IRQ’s
shows the basic architecture of each PWM. PWM
Section 8.8
ARM9 microcontroller with CAN and LIN
Sync_out
Sync_in
Counter,
prescale
registers
counter
shadow
PWM
&
Transfer_enable_in
Transfer_enable_out
for information on generation of
LPC2917/19
PWM domain
© NXP B.V. 2007. All rights reserved.
Match outputs
Capture inputs
Trap input
Carier inputs
38 of 68

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