lpc2917 NXP Semiconductors, lpc2917 Datasheet - Page 43

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lpc2917

Manufacturer Part Number
lpc2917
Description
Arm9 Microcontroller With Can And Lin
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC2917_19_1
Preliminary data sheet
Fig 12. Block diagram of the CGU
There are two primary clock generators: a low-power ring oscillator (LP_OSC) and a
crystal oscillator. See
LP_OSC is the source for the BASE_PCR_CLK that clocks the CGU itself and for
BASE_SAFE_CLK that clocks a minimum of other logic in the device (like the watchdog
timer). To prevent the device from losing its clock source LP_OSC cannot be put into
power-down. The crystal oscillator can be used as source for high-frequency clocks or as
an external clock input if a crystal is not connected.
Secondary clock generators are a PLL and seven fractional dividers (FDIV0..6). The PLL
has three clock outputs: normal, 120q phase-shifted and 240q phase-shifted.
Configuration of the CGU:
choice can be made from the primary and secondary clock generators according to
Figure
13.
LP_OSC
Oscilator
Xtal
Frequency
Monitor
Clock Source Bus
Rev. 1.01 — 15 November 2007
Figure
PLL
DTL MMIO Interface
Detection
Clock
For every output generator - generating the base clocks - a
12.
FDIV0
FDIV1
FDIV6
ARM9 microcontroller with CAN and LIN
OUT 0
OUT 1
OUT 9
LPC2917/19
© NXP B.V. 2007. All rights reserved.
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