lpc2917 NXP Semiconductors, lpc2917 Datasheet - Page 55

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lpc2917

Manufacturer Part Number
lpc2917
Description
Arm9 Microcontroller With Can And Lin
Manufacturer
NXP Semiconductors
Datasheet

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Table 30.
V
measured with respect to ground; positive currents flow into the IC; unless otherwise specified.
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
12. Dynamic characteristics
Table 31.
V
respect to ground; positive currents flow into the IC; unless otherwise specified.
LPC2917_19_1
Preliminary data sheet
Symbol
Oscillator
R
C
Power-up reset
V
V
V
Symbol
I/O pins
t
t
THL
TLH
DD(CORE)
DD(CORE)
trip(high)
trip(low)
trip(dif)
s(xtal)
i
All parameters are guaranteed over the virtual junction temperature range by design. Pre-testing is performed at T
level. Cased products are tested at T
the specified temperature and power-supply voltage range.
Leakage current is exponential to temperature; worst-case value is at 125 C Tvj. All clocks off. Analog modules and FLASH powered
down.
For Port 0, pin 0 to pin 15 add maximum 1.5 pF for input capacitance to ADC. For Port 0, pin 16 to pin 31 add maximum 1.0 pF for input
capacitance to ADC.
This value is the minimum drive capability. Maximum short-circuit output current is 33 mA (drive HIGH-level, shorted to ground) or
38 mA. (drive LOW-level, shorted to V
C
The power-up reset has a time filter: V
V
Not 5 V-tolerant when pull-up is on.
For I/O Port 0, the maximum input voltage is defined by V
This parameter is not part of production testing or final testing, hence only a typical value is stated. Maximum and minimum values are
based on simulation results.
trip(low)
xtal
is crystal load capacitance and C
= V
= V
for 11 Ps before internal reset is asserted.
Static characteristics
Dynamic characteristics
DD(OSC_PLL)
DD(OSC_PLL)
Parameter
Crystal series resistance.
Input capacitance of
XIN_OSC.
High trip-level voltage.
Low trip-level voltage.
Difference between high
and low trip-level
voltages.
Parameter
HIGH-to-LOW
transition time.
LOW-to-HIGH
transition time.
; V
; V
DD(IO)
DD(IO)
= 2.7 V to 3.6 V; V
= 2.7 V to 3.6 V; V
…continued
amb
ext
DD(CORE)
DD(IO)
= 25 qC (final testing). Both pre-testing and final testing use correlated test conditions to cover
are the two external load capacitors.
Conditions
f
f
osc
osc
). The device will be damaged if multiple outputs are shorted.
C
C
C
C
C
C
Conditions
C
C
must be above V
= 10 MHz to 15 MHz
xtal
ext
xtal
ext
= 15 MHz to 20 MHz
xtal
ext
L
L
Rev. 1.01 — 15 November 2007
= 30 pF
= 30 pF
= 18 pF
= 39 pF
= 18 pF
= 10 pF;
= 20 pF;
= 10 pF;
DD(A3V3)
DD(A3V3)
I(ADC)
.
= 3.0 V to 3.6 V; T
= 3.0 V to 3.6 V; T
trip(high)
for 2 Ps before reset is de-asserted; V
[5]
[5]
[9]
[6]
[6]
[6]
Min
-
-
-
-
1.2
1.1
50
ARM9 microcontroller with CAN and LIN
Min
4
4
vj
vj
= -40
=

40
q
q
C to +125
C; all voltages are measured with
Typ
-
-
Typ
-
-
-
1.4
1.3
120
[1]
LPC2917/19
q
C; all voltages are
Max
160
60
80
2
1.6
1.5
180
Max
13.8
13.8
DD(CORE)
© NXP B.V. 2007. All rights reserved.
amb
= 125 qC on wafer
must be below
Unit
ns
ns
55 of 68
Unit
:
:
:
pF
V
V
mV

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