mc9s08jm60 Freescale Semiconductor, Inc, mc9s08jm60 Datasheet - Page 308
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mc9s08jm60
Manufacturer Part Number
mc9s08jm60
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08JM60.pdf
(386 pages)
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Universal Serial Bus Device Controller (S08USBV1)
17.3.13 Endpoint Control Register (EPCTLn, n=0-6)
The endpoint control registers contains the endpoint control bits (EPCTLDIS, EPRXEN, EPTXEN, and
EPHSHK) for each endpoint available within the USB module for a decoded address. These four bits
define all of the control necessary for any one endpoint. The formats for these registers are shown in the
tables below. Endpoint 0 (ENDP0) is associated with control pipe 0 which is required by the USB for all
functions. Therefore, after a USBRST interrupt has been received, the microcontroller must set EPCTL0
to contain 0x0D.
308
(EP0-6)
FRM[10:8]
Reset
Reset
EPCTLDIS
Field
EPRXEN
EPTXEN
2–0
W
R
Field
W
R
4
3
2
Frame Number — These bits represent the high order bits of the 11-bit frame number.
0
0
7
0
0
7
Endpoint Control — This bit defines if an endpoint is enabled and the direction of the endpoint. The
endpoint enable/direction control is defined in
Endpoint Rx Enable — This bit defines if an endpoint is enabled for OUT transfers. The endpoint
enable/direction control is defined in
Endpoint Tx Enable — This bit defines if an endpoint is enabled for IN transfers. The endpoint
enable/direction control is defined in
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 17-16. Frame Number Register High (FRMNUMH)
0
0
6
0
0
6
Figure 17-17. Endpoint Control Register (EPCTLn)
Table 17-17. FRMNUMH Field Descriptions
Table 17-18. EPCTLn Field Descriptions
MC9S08JM60 Series Data Sheet, Rev. 2
0
0
5
0
0
5
EPCTLDIS
Table
Table
0
4
0
0
4
17-19.
17-19.
Description
Table
Description
EPRXEN
17-19.
3
0
3
0
0
EPTXEN
FRM10
0
0
2
2
EPSTALL
Freescale Semiconductor
FRM9
0
0
1
1
EPHSHK
FRM8
0
0
0
0
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