mc9s08jm60 Freescale Semiconductor, Inc, mc9s08jm60 Datasheet - Page 361

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mc9s08jm60

Manufacturer Part Number
mc9s08jm60
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1
2
3
Num C
A.11 MCG Specifications
Freescale Semiconductor
10
11
12
13
14
15
16
17
18
19
20
21
22
23
1
2
3
4
5
6
7
8
9
TRIM register at default value (0x80) and FTRIM control bit at default value (0x0).
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference, this
specification assumes it is already running.
This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled (BLPE,
BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes it is already
running.
P
P Average internal reference frequency – untrimmed
P Average internal reference frequency Q – user trimmed
D Internal reference startup time
P DCO output frequency range - trimmed
C
C
P
C
C FLL acquisition time
D PLL acquisition time
C
D VCO operating frequency
D PLL reference frequency range
D Lock entry frequency tolerance
D Lock exit frequency tolerance
D Lock time – FLL
D Lock time – PLL
D Loss of external clock minimum frequency – RANGE = 0
D Loss of external clock minimum frequency – RANGE = 1
T
T Jitter of PLL output clock measured over 625 ns
Internal reference frequency - factory trimmed at V
5 V and temperature = 25
DCO output frequency range - untrimmed
value provided for reference: f
Resolution of trimmed DCO output frequency at fixed
voltage and temperature (using FTRIM)
Resolution of trimmed DCO output frequency at fixed
voltage and temperature (not using FTRIM)
Total deviation of trimmed DCO output frequency over
voltage and temperature
Total deviation of trimmed DCO output frequency over
fixed voltage and temperature range of 0 –70
Long term Jitter of DCO output clock (averaged over
2ms interval)
Long term accuracy of PLL output clock (averaged over
2 ms)
Table A-12. MCG Frequency Specifications (Temperature Range = –40 to 125°C Ambient)
4
2
3
Rating
°C
dco_ut
7
6
MC9S08JM60 Series Data Sheet, Rev. 2
= 1024 X f
1
°C
int_ut
DD
1
=
f
pll_jitter_625ns
f
pll_jitter_2ms
Δf
Δf
t
t
Symbol
pll_acquire
fll_acquire
f
Δf
Δf
t
f
t
f
dco_res_t
dco_res_t
loc_high
C
f
pll_lock
loc_low
f
f
dco_ut
D
fll_lock
f
t
f
pll_ref
D
int_ut
dco_t
f
int_ft
irefst
int_t
dco_t
dco_t
Jitter
vco
lock
unl
(16/5) x f
(3/5) x f
31.25
±1.49
±4.47
25.6
Min
7.0
1.0
25
32
int
int
Appendix A Electrical Characteristics
Typical
0.590
0.566
31.25
33.48
32.7
±0.1
±0.2
+0.5
–1.0
±0.5
0.02
60
5
5
1075(1/
1075(1/
t
t
pll_acquire+
fll_acquire+
39.0625
41.66
42.66
±2.98
±5.97
Max
±0.2
±0.4
55.0
100
0.2
2.0
40
±2
±1
1
1
f
f
pll_ref)
int_t)
%f
%f
%f
%f
%f
MHz
MHz
MHz
MHz
Unit
%f
%f
kHz
kHz
kHz
kHz
kHz
ms
ms
μs
%
%
361
s
s
dco
dco
dco
dco
dco
pll
pll

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