km4132g271b Samsung Semiconductor, Inc., km4132g271b Datasheet - Page 30

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km4132g271b

Manufacturer Part Number
km4132g271b
Description
128k X 32bit X 2 Banks Synchronous Graphic Ram Lvttl
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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KM4132G271B
*Note : 1. All input can be don't care when CS is high at the CLK high going edge.
3. Enable and disable auto precharge function are controlled by A
4. A
5. Enable and disable Write-per Bit function are controlled by DSF in Row Active command.
6. Block write/normal write is controlled by DSF.
2. Bank active & read/write are controlled by A
8
A
DSF
A
A
0
1
0
1
0
0
1
A
H
and A
9
L
9
8
0
1
8
DSF
A
9
X
0
1
H
H
L
L
9
A9
control bank precharge when precharge command is asserted.
0
1
0
1
Normal write
Block write
Operation
Active & Read/Write
Bank A row active, disable write per bit function for bank A
Bank A row active, enable write per bit function for bank A
Bank B row active, disable write per bit function for bank B
Bank B row active, enable write per bit function for bank B
Disable auto precharge, leave bank A active at end of burst.
Disable auto precharge, leave bank B active at end of burst.
Enable auto precharge, precharge bank A at end of burst.
Enable auto precharge, precharge bank B at end of burst.
Bank A
Bank B
Precharge
Both Bank
Bank A
Bank B
Minimum cycle time
Operation
t
Operation
t
9
CCD
BWC
.
- 30
8
in read/write command.
Rev. 2.4 (May 1998)
CMOS SGRAM

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