tc59lm818dmb TOSHIBA Semiconductor CORPORATION, tc59lm818dmb Datasheet - Page 41

• Manufacturer Part Number: tc59lm818dmb
• Description: 288mbits Network Fcram2 ? 4,194,304-words ? 4 Banks ? 18-bits
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Unidirectional DS/Free Running QS mode
Unidirectional DS/QS mode
Command
Address
(output)
(output)
POWER DOWN TIMING (CL = 4, BL = 4)
(input)
(input)
(input)
(input)
Write cycle to Power Down Mode
PD
CLK
CLK
DQ
DQ
DS
QS
DS
QS
Note: PD must be kept "High" level until WL+2 clock cycles from LAL command.
WRA
UA
0
Low
In Power Down Mode, PD "Low" and a stable clock signal must be maintained.
When PD is brought to "High", a valid executable command may be applied l
PD should be brought to "High" within t
LAL
LA
1
2
WL = 3
WL = 3
WL = 3
3
D0 D1 D2 D3
D0 D1 D2 D3
4
2 clock cycles
5
DESL
t
IH
REFI
6
(max.) to maintain the data written into cell.
t
IS
7
I
PD
= 2 cycle
8
9
l
RC(min)
10
TC59LM818DMB-33,-40
, t
REFI(max)
n-2
PDA
cycles later.
n-1
2005-10-19 41/57
n
DESL
n+1
I
Rev 1.4
PDA
t
PDEX
WRA
n+2
RDA
UA
or