wm9081 Wolfson Microelectronics plc, wm9081 Datasheet - Page 26

• Manufacturer Part Number: wm9081
• Description: Mono Dac With 2.6w Class Ab/d Speaker Driver, Dynamic Range Controller And Retune Mobile Parametric Equalizer
• Manufacturer: Wolfson Microelectronics plc

WM9081
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Figure 21 Hardware Control Mode Example – 4FS Mode, Left Channel
DEVICE ENABLE
The WM9081 is enabled by logic 1 on the SDIN/ENA pin. The logic level is referenced to the DBVDD
power domain.
Note that in 4FS mode (see below), the WM9081 starts up and shuts down automatically according
to the BCLK signal. In 4FS mode, the SDIN/ENA pin is ignored and may be set to either Logic 0 or
Logic 1.
LEFT/RIGHT CHANNEL SELECT
The Left/Right channel selection is controlled using the SCIM/CHANNEL pin. The logic level is
referenced to the DBVDD power domain. Logic 0 selects Left channel. Logic 1 selects Right channel.
The selected channel from the Digital Audio Interface will be applied to the Class D speaker output. It
is recommended that the logic level on the SCIM/CHANNEL pin is not changed while the audio path
of the WM9081 is enabled.
4FS MODE SELECT
The WM9081 supports two variants of Hardware Control mode. Normal mode is selected by a logic 0
on the CS/ADDR1/4FS pin. 4FS mode is selected by a logic 1 on the CS/ADDR1/4FS pin. The logic
level is referenced to the DBVDD power domain. It is recommended that the logic level on the
CS/ADDR1/4FS pin is not changed while the audio path of the WM9081 is enabled.
In Normal mode, the WM9081 is clocked via a 12.288MHz input to the MCLK pin. The digital audio
interface is configured in 16-bit I
In 4FS mode, the WM9081 is clocked via the BCLK pin of the digital audio interface. The digital
audio interface is configured in 16-bit I
4 x FS, where FS is the normal sample rate of 48kHz. It follows that the BCLK frequency is
PROCESSOR
Digital Audio
Interface
SCIM/CHANNEL
2
___
CS/ADDR1/4FS
SDOUT/ADDR0
S format. The sample rate of the digital audio input must be 48kHz.
SDIN/ENA
SWMODE
DACDAT
2
LRCLK
S format. The sample rate of the digital audio input must be
MCLK
SCLK
BCLK
IRQ
___
IN1
IN2
INTERFACE
CONTROL
FLL
PP, Rev 3.0, April 2009
W
0dB / -6dB
0dB / -6dB
WM9081
DIGITAL AUDIO
INTERFACE
Pre-Production
CONTROL
CLOCK
DBVDD
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