wm9081 Wolfson Microelectronics plc, wm9081 Datasheet - Page 56

• Manufacturer Part Number: wm9081
• Description: Mono Dac With 2.6w Class Ab/d Speaker Driver, Dynamic Range Controller And Retune Mobile Parametric Equalizer
• Manufacturer: Wolfson Microelectronics plc

WM9081
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In Left Justified mode, the MSB is available on the first rising edge of BCLK following a LRCLK
transition. The other bits up to the LSB are then transmitted in order. Depending on word length,
BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition.
Figure 40 Left Justified Audio Interface (assuming n-bit word length)
In I
The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK
frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and
the MSB of the next.
Figure 41 I2S Justified Audio Interface (assuming n-bit word length)
In DSP mode, the left channel MSB is available on either the 1
edge of BCLK (selectable by AIF_LRCLK_INV) following a rising edge of LRCLK. Right channel data
immediately follows left channel data. Depending on word length, BCLK frequency and sample rate,
there may be unused BCLK cycles between the LSB of the right channel data and the next sample.
In device master mode, the LRCLK output will resemble the frame pulse shown in Figure 42 and
Figure 43. In device slave mode, Figure 44 and Figure 45, it is possible to use any length of frame
pulse less than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK
period before the rising edge of the next frame pulse.
2
S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition.
st
(mode B) or 2
PP, Rev 3.0, April 2009
nd
(mode A) rising
Pre-Production
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