wm9081 Wolfson Microelectronics plc, wm9081 Datasheet - Page 71

• Manufacturer Part Number: wm9081
• Description: Mono Dac With 2.6w Class Ab/d Speaker Driver, Dynamic Range Controller And Retune Mobile Parametric Equalizer
• Manufacturer: Wolfson Microelectronics plc

Pre-Production
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Table 42 FLL Register Map
FREE-RUNNING FLL CLOCK
The FLL can generate a clock signal even when no external reference is available. However, it
should be noted that the accuracy of this clock is reduced, and a reference source should always be
used where possible. Note that, in free-running modes, the FLL is not sufficiently accurate for hi-fi
audio applications. However, the free-running modes are suitable for clocking other functions,
including the Write Sequencer and Class D loudspeaker driver. The free-running mode can be used
to support the analogue (DAC bypass) audio path.
A clock reference is required for initial configuration of the FLL as described above. For free-running
operation, the FLL_HOLD bit should be set, as described in Table 42. When FLL_HOLD is set, the
FLL will continue to generate a stable output clock after the reference input is stopped or
disconnected.
EXAMPLE FLL CALCULATION
To generate 12.288 MHz output (F
R20 (14h)
FLL Control 5
REGISTER
•
•
ADDRESS
Set FLL_CLK_REF_DIV in order to generate F
FLL_CLK_REF_DIV = 00 (divide by 1)
Set FLL_CTRL_RATE to the recommended setting:
FLL_CTRL_RATE = 000 (divide by 1)
BIT
3:0
4:3
1:0
FLL_GAIN [3:0]
FLL_CLK_REF_
DIV [1:0]
FLL_CLK_SRC
[1:0]
OUT
LABEL
) from a 12.000 MHz reference clock (F
DEFAULT
0100
00
00
REF
<=13.5MHz:
Gain applied to error
0000 = x 1 (Recommended value)
0001 = x 2
0010 = x 4
0011 = x 8
0100 = x 16
0101 = x 32
0110 = x 64
0111 = x 128
1000 = x 256
Recommended that this register is not
changed from default.
FLL Clock Reference Divider
00 = MCLK / 1
01 = MCLK / 2
10 = MCLK / 4
11 = MCLK / 8
MCLK (or other input reference) must
be divided down to <=13.5MHz.
For lower power operation, the
reference clock can be divided down
further if desired.
FLL Clock source
00 - BCLK
01 - MCLK
10 - LRCLK
11 = Reserved
REF
PP, Rev 3.0, April 2009
DESCRIPTION
):
WM9081
71