wm8580a Wolfson Microelectronics plc, wm8580a Datasheet - Page 30

• Manufacturer Part Number: wm8580a
• Description: Multichannel Codec With S/pdif Transceiver
• Manufacturer: Wolfson Microelectronics plc

WM8580
DAC FEATURES
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2.
DAC INPUT CONTROL
The Primary Audio Interface Receiver has a separate input pin for each stereo DAC. Any input pin
can be routed to any DAC using the DACSEL register bits.
DAC OVERSAMPLING CONTROL
For sampling clock ratios of 256fs to 1152fs the DACs should be programmed to operate at 128
times oversampling rate. For sampling clock ratios of 128fs and 192fs, the DACs must be
programmed to operate at 64 times oversampling rate. The DACOSR register bit selects between
128x and 64x oversampling.
Table 17 DAC Input Select Register
Table 18 DAC Oversampling Register
REGISTER ADDRESS
REGISTER ADDRESS
In 24 bit I
a minimum of 24 BCLK cycles and low for a minimum of 24 BCLK cycles. If exactly 32 bit
clocks occur in one full left/right clock period the interface will auto detect and configure a 16 bit
data word length.
DAC Control 1
PAIF 3
R12
0Ch
R15
0Fh
2
S mode, any data width of 24 bits or less is supported provided that LRCLK is high for
BIT
3:2
5:4
BIT
1:0
6
DACOSR
DAC1SEL
DAC2SEL
DAC3SEL
LABEL
LABEL
[1:0]
[1:0]
[1:0]
DEFAULT
DEFAULT
0
00
01
10
DAC Oversampling Rate Control
DAC digital input select
00 = DAC takes data from DIN1
01 = DAC takes data from DIN2
10 = DAC takes data from DIN3
0= 128x oversampling
1= 64x oversampling
DESCRIPTION
DESCRIPTION
PD, Rev 4.7, March 2009
Production Data
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