a2f500m3b-1csh484 Actel Corporation, a2f500m3b-1csh484 Datasheet - Page 24
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a2f500m3b-1csh484
Manufacturer Part Number
a2f500m3b-1csh484
Description
Actel
Manufacturer
Actel Corporation
Datasheet
1.A2F500M3B-1CSH484.pdf
(170 pages)
- Current page: 24 of 170
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SmartFusion DC and Switching Characteristics
Table 2-10 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software Settings
Table 2-11 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software Settings
Table 2-12 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software Settings
2- 12
3.3 V LVTTL / 3.3 V LVCMOS
3.3 V LVCMOS / 3.3 V LVCMOS – Schmitt trigger
2.5 V LVCMOS
2.5 V LVCMOS – Schmitt trigger
1.8 V LVCMOS
1.8 V LVCMOS – Schmitt trigger
1.5 V LVCMOS (JESD8-11)
1.5 V LVCMOS (JESD8-11) – Schmitt trigger
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS (JESD8-11)
3.3 V PCI
3.3 V PCI-X
Differential
LVDS
LVPECL
Note:
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS (JESD8-11)
Single-Ended
*Dynamic power consumption is given for standard load and software default drive strength and output slew.
Applicable to MSS I/O Banks
Applicable to FPGA I/O Banks
Applicable to MSS I/O Banks
C
C
LOAD
LOAD
10
10
10
10
35
35
35
35
10
10
–
–
(pF)
(pF)
VCCMSSIOBx (V)
VCCFPGAIOBx
VCCMSSIOBx (V)
R e visio n 3
3.3
(V)
2.5
3.3
2.5
1.8
1.5
3.3
2.5
1.8
1.5
3.3
3.3
1.5
3.3
3.3
2.5
2.5
1.8
1.8
1.5
Static Power
Static Power
PDC8 (mW)
PDC8 (mW)
Static Power
PDC7 (mW)
19.54
7.74
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
2
*
PAC10 (µW/MHz)
PAC10 (µW/MHz)
Dynamic Power
Dynamic Power
PAC9 (µW/MHz)
Dynamic Power
468.67
267.48
149.46
103.12
201.02
201.02
167.54
155.65
89.71
88.23
45.03
31.01
17.21
20.00
5.55
7.03
2.61
2.72
1.98
1.93
3
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