a2f500m3b-1csh484 Actel Corporation, a2f500m3b-1csh484 Datasheet - Page 33

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a2f500m3b-1csh484

Manufacturer Part Number
a2f500m3b-1csh484
Description
Actel
Manufacturer
Actel Corporation
Datasheet
User I/O Characteristics
Figure 2-3 • Timing Model
I/O Banks only)
to Advanced
(Applicable
LVPECL
(Applicable for
Advanced I/O
t
PY
Banks only)
= 0.78 ns (Advanced I/O Banks)
Clock
M-LVDS
Input LVTTL
BLVDS,
LVDS,
Timing Model
Operating Conditions: –1 Speed, Commercial Temperature Range (T
Worst Case VCC = 1.425 V
t
PY
(Non-Registered)
(Registered)
= 1.08 ns
t
I/O Module
I/O Module
t
t
PY
ICLKQ
ISUD
= 1.27 ns
= 0.27 ns
= 0.24 ns
D
Q
Register Cell
t
t
CLKQ
SUD
D
= 0.44 ns
= 0.56 ns
Combinational Cell
Q
(Advanced I/O Banks)
Combinational Cell
t
PD
Combinational Cell
t
PD
Clock
Input LVTTL
t
PY
= 0.89 ns
t
= 0.57 ns
PD
= 0.78 ns
= 0.47 ns
Combinational Cell
Combinational Cell
Y
Y
t
PD
t
PD
Y
= 0.51 ns
= 0.48 ns
R e v i s i o n 3
Register Cell
Combinational Cell
t
t
CLKQ
SUD
D
t
PD
Y
Y
= 0.44 ns
(Non-Registered)
= 0.56 ns
= 0.49 ns
(Advanced I/O Banks)
t
Q
I/O Module
DP
t
Clock
Input LVTTL
PY
= 2.71 ns (Advanced I/O Banks)
(Non-Registered)
(Non-Registered)
t
t
DP
I/O Module
I/O Module
DP
= 0.78 ns
Y
= 4.08 ns (Advanced I/O Banks)
= 3.76 ns (Advanced I/O Banks)
Actel SmartFusion Intelligent Mixed Signal FPGAs
(Non-Registered)
t
I/O Module
DP
LVTTL Output drive strength = 12 mA
= 1.38 ns
t
t
D
OCLKQ
OSUD
(Registered)
I/O Module
LVTTL Output drive strength = 8 mA
LVCMOS 1.5 V Output drive strength = 4 mA
High slew rate
Q
= 0.32 ns
= 0.60 ns
t
(Advanced I/O Banks)
DP
High slew rate
= 2.71 ns
LVPECL (applicable to
Advanced I/O banks only)
J
= 85°C),
High slew rate
LVTTL 3.3 V Output drive
strength = 12 mA High slew rate
2- 21

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